Description

The LC4128ZC-75MN132C is a member of the ispMACH 4000 family from Lattice, which offers a SuperFAST CPLD solution. This high-performance programmable logic device (CPLD/FPGA) is a blend of Lattice’s two most popular architectures, the ispLSI 2000, and ispMACH 4A, combining their best features. The ispMACH 4000 architecture delivers high performance with low power in a flexible CPLD family.

Specifications and features

• Maximum operating frequency: 400MHz
• Propagation delay: 2.5ns
• Up to four global clock pins with programmable clock polarity control
• Up to 80 PTs per output
• Enhanced macrocells with individual clock, reset, preset, and clock enable controls
• Up to four global OE controls and individual local OE control per I/O pin
• Low static and dynamic power consumption
• Broad device offering with multiple temperature range support, including commercial, industrial, and extended
• Operation with 3.3V, 2.5V, or 1.8V LVCMOS I/O and 3.3V (4000V), 2.5V (4000B), or 1.8V (4000C/Z) supplies
• Lead-free package options
• IEEE 1149.1 boundary scan testable
• In-system programmable (ISP) using IEEE 1532 compliant interface

Application Scenarios

The LC4128ZC-75MN132C is suitable for a wide range of applications, including power-sensitive consumer applications that require high performance with low power consumption. The device finds applications in fast counters, state machines, and address decoders with its fast input gating and wide-PT path. The device also supports 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces, and is open-drain capable.

Comparison

• High Performance
• Low Power Consumption
• Easy to Design
• Broad Device Offering
• Broad Temperature Range Support

• May not be an ideal choice for low-performance applications
• May not be the most cost-effective option on the market