ADSP-TS101SAB1Z-100 - Brand New Analog Devices Digital Signal Processors / Controllers (DSPs/DSCs)
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Description
The ADSP-TS101SAB1Z-100 is a TigerSHARC® processor designed for large signal processing tasks and communications infrastructure in demanding multiprocessor DSP applications. With a static superscalar architecture and very wide memory widths, this DSP provides exceptional performance and supports 32- and 40-bit floating-point and 8-, 16-, 32-, and 64-bit fixed-point processing. The TigerSHARC processor can execute up to four instructions each cycle, performing 24 fixed-point (16-bit) operations or six floating-point operations.
Specifications and features
- 300 MHz, 3.3 ns instruction cycle rate
- 6M bits of internal—on-chip—SRAM memory
- 19 mm × 19 mm (484-ball) or 27 mm × 27 mm (625-ball) PBGA package
- Dual computation blocks—each containing an ALU, a multiplier, a shifter, and a register file
- Dual integer ALUs, providing data addressing and pointer manipulation
- Integrated I/O includes 14-channel DMA controller, external port, 4 link ports, SDRAM controller, programmable flag pins, 2 timers, and timer expired pin for system integration
- 1149.1 IEEE compliant JTAG test access port for on-chip emulation
- On-chip arbitration for glueless multiprocessing with up to 8 TigerSHARC processors on a bus
Application Scenarios
The ADSP-TS101SAB1Z-100 is ideal for use in telecommunications infrastructure and other large multiprocessor DSP applications. It also supports low overhead DMA transfers between internal memory, external memory, memory-mapped peripherals, link ports, other DSPs (multiprocessor), and host processors, making it a flexible choice for a variety of applications.
Comparison
Advantages- Optimized for large signal processing tasks and communications infrastructure
- Exceptional performance on DSP algorithms and I/O benchmarks
- Flexible instruction set and high-level language-friendly DSP architecture make it easier to program
- Supports low overhead DMA transfers between internal memory, external memory, memory-mapped peripherals, link ports, other DSPs (multiprocessor), and host processors
- Enables scalable multiprocessing systems with low communications overhead
Disadvantages- None identified
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Datenblatt
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Shopping guide
Delivery period:
- - Will ship out in 2-3 days
- - DHL Express: 3-7 business days
- - DHL eCommerce: 12-22 business days
- - FedEx International Priority: 3-7 business days
- - EMS: 10-15 business days
Shipping fee:
- - Automatic Email notification (above 5 times)
- - View in your order page
Shipping option:
DHL, FedEx, EMS, SF Express, and Registered Air MailShipping tracking:
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- - View in your order page
How to Buy:
- - In-stock, Add to cart > Check out > Submit order > Complete payment >Delivery.
- - Inquiry, Add to inquiry sheet/Submit bom/inquire file/Send email us > Quote > Place order > Complete payment >Delivery.
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Payment:
- - Paypal,Credit Card includes Visa, Master, American Express.
- - Wire transfer, include Local bank transfer.
- - Western Union.
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- Datasheet: Download ADSP-TS101SAB1Z-100
- Chipdaten Teil: CD87-ADSP-TS101SAB1Z-100
- Lagerhaus: China, Hongkong
- Versenden: Innerhalb von 24 Stunden
- Kostenloser Versand: Yes
- Bevorzugter Versand: Yes, 3-5 days
- Letzte Aktualisierung: 2024/09/17 03:46 +0800
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