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Description
The ZL30160WE is a highly integrated electronic component model that provides all of the functionality required for a central timing card in carrier-grade network equipment. It supports input reference monitoring, automatic reference selection, and both external timing and line timing modes. The ZL30160WE also features hitless reference switching, wander and jitter filtering, master/slave crossover for minimizing phase alignment between redundant timing cards, and an independent derived output timing path for supporting the SETS functionality.
Specifications and features
- Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks (EEC option 1 and 2)
- Supports the requirements of Telcordia GR-1244 Stratum 3 and GR-253, ITU-T G.813, and G.781 SETS
- Supports ITU-T G.823, G.824 and G.8261 for 2048 kbit/s and 1544 kbit/s interfaces
- Meets the SONET/SDH jitter generation requirements up to OC-48/STM-16
- Synchronizes to telecom reference clocks (2 kHz, N*8 kHz up to 77.76 MHz, 155.52 MHz) or to Ethernet reference clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz)
- Supports composite clock inputs (64 kHz, 64 kHz + 8 kHz, 64kHz + 8 kHz + 400 Hz)
- Generates standard SONET/SDH clock rates (e.g., 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz, 622.08 MHz) or Ethernet clock rates (e.g., 25 MHz, 50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for synchronizing Gigabit Ethernet PHYs
- Programmable output synthesizers (P0, P1) generate telecom clock frequencies from any multiple of 8 kHz up to 100 MHz
- Generates several styles of telecom frame pulses with selectable pulse width, polarity, and frequency
- Provides two DPLLs which are independently configurable through a serial interface
- Internal state machine automatically controls mode of operation (free-run, locked, holdover)
- Flexible input reference monitoring automatically disqualifies references based on frequency and phase irregularities
- Provides automatic reference switching and holdover during loss of reference input
- Supports master/slave configuration and dynamic input to output delay compensation for AdvancedTCA™
- Configurable input to output delay and output to output phase alignment
Application Scenarios
- ITU-T G.8262 System Timing Cards which support 1 GbE and 10 GbE interfaces
- Telcordia GR-253 Carrier Grade SONET/SDH Stratum 3 System Timing Cards
- System Timing Cards which support ITU-T G.781 SETS (SDH Equipment Timing Source)
Comparison
Advantages- Highly integrated device
- Supports various requirements of ITU-T and Telcordia standards
- Provides flexible input and output options
- Supports composite clock inputs
- Programmable output synthesizers for generating telecom clock frequencies
Disadvantages- Requires configuration through a serial interface
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Similar parts: 430483 , Click to view
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Datasheet
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Shopping guide
Delivery period:
- - Will ship out in 2-3 days
- - DHL Express: 3-7 business days
- - DHL eCommerce: 12-22 business days
- - FedEx International Priority: 3-7 business days
- - EMS: 10-15 business days
Shipping fee:
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- - View in your order page
Shipping option:
DHL, FedEx, EMS, SF Express, and Registered Air MailShipping tracking:
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How to Buy:
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- - Inquiry, Add to inquiry sheet/Submit bom/inquire file/Send email us > Quote > Place order > Complete payment >Delivery.
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Additional Information
- Datasheet: Download ZL30160WE
- Chipdatas Part: CD94-ZL30160WE
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 08:29 +0800
Refund
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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Payment Method
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