AT17F16A-30CU - Brand New Intel / Altera Memory - Configuration Proms for FPGAs
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Description
The AT17C65/128/256 and AT17LV65/128/256 (AT17 Series) FPGA Configuration EEPROMS (Configurator) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17 Series is packaged in the 8-pin DIP and the popular 20-pin PLCC and SOIC. The AT17 Series family uses a simple serial-access procedure to configure one or more FPGA devices. The AT17 Series organization supplies enough memory to configure one or multiple smaller FPGAs. Using a special feature of the AT17 Series, the user can select the polarity of the reset function by programming a special EEPROM bit. The AT17 Series can be programmed with industry standard programmers.
Specifications and features
- E2 Programmable 65,536 x 1, 131,072 x 1, and 262,144 x 1 bit Serial Memories Designed to Store Configuration Programs For Programmable Gate Arrays
- Simple Interface to SRAM FPGAs Requires Only One User I/O Pin
- Compatible With AT6000 FPGAs, ATT3000 FPGA, EPF8000 FPGAs, ORCA FPGAs, XC2000, XC3000, XC4000, XC5000 FPGAs, MPA1000
- Cascadable To Support Additional Configurations or Future Higher-density Arrays (17C128 and 17C256 only)
- Low-power CMOS EEPROM Process
- Programmable Reset Polarity
- Available In the Space-efficient Plastic DIP or Surface-mount PLCC and SOIC Packages
- In-System Programmable Via 2-Wire Bus
- Emulation of 24CXX Serial EPROMs
- Available in 3.3V ± 10% LV Version
Application Scenarios
This model is suitable for applications that require FPGA configuration memory. It can be used to configure one or multiple smaller FPGAs using a simple serial-access procedure. It is compatible with various FPGAs and supports programmable reset polarity. The AT17 Series is available in different packages, making it suitable for different space requirements. It can be programmed in-system via a 2-wire bus.
Comparison
Advantages- Easy-to-use and cost-effective configuration memory for Field Programmable Gate Arrays
- Supports configuration of one or multiple smaller FPGAs
- Compatible with various FPGAs and supports programmable reset polarity
- Available in different packages to suit different space requirements
- Can be programmed in-system via a 2-wire bus
Disadvantages- Higher-density configurations are only supported by certain models
- Limited to 3.3V ± 10% LV Version
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Datasheet
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- Datasheet: Download AT17F16A-30CU
- Chipdatas Part: CD89-AT17F16A-30CU
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- Last Updated: 2024/06/13 08:10 +0800
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