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GENERAL DESCRIPTIONS
MX97102 implements the 4-wire S/T interface used to link voice/data terminals to an ISDN. It is designed for the user site of the ISDN-basic access, two 64kbit/s B channels and a 16kbit/s D channel.
MX97102 can be mainly divided into three portions according to their interfaces. Except these three interface functions, it also provides the LAPD controller which handles the HDLC packets of the ISDN D-channel for the associated microprocessor.FEATURES
• Pin-to-Pin and Register-to-Register compatible with Siemens 2186
• Full duplex 2B+D ISDN S/T Transceiver according to CCITT I.430
• GCI digital interface
• 3 types of 8-bit CPU interface
• Receive timing recovery with adaptively switched thresholds
• E-channel Monitoring
• Programmable SDS1,SDS2
• D-channel access control
• LAPD(HDLC) support with FIFO(2x64) buffers
• Activation/Deactivation
• Multiframing with S and Q bit access
• CPU access to B and IC channels
• Watchdog timer
• Package types : P-LCC-44, P-LQFP-64 -
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- Datasheet: Download MX97102QC
- Chipdatas Part: CD89-MX97102QC
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- Last Updated: 2024/09/29 06:27 +0800
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