ISPLSI2064E-200LT100 - Brand New LATTICE Programmable Logic Device (CPLDs/FPGAs)
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Description
The ispLSI 2064E is a High Density Programmable Logic Device. The device contains 64 Registers, 64 Universal I/O pins, four Dedicated Input Pins, three Dedicated Clock Input Pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2064E features 5V in-system programmability and in- system diagnostic capabilities. The ispLSI 2064E offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.
Features
• SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC
— 2000 PLD Gates
— 64 I/O Pins, Four Dedicated Inputs
— 64 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— 100% Functionally and JEDEC Upward Compatible with ispLSI 2064 Devices
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 200 MHz Maximum Operating Frequency
— tpd = 4.5 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— 5V Programmable Logic Core
— ispJTAG™ In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port
— User-Selectable 3.3V or 5V I/O Supports Mixed Voltage Systems
— PCI Compatible Outputs
— Open-Drain Output Option
— Electrically Erasable and Reprogrammable
— Non-Volatile
— Unused Product Term Shutdown Saves Power
• ispLSI OFFERS THE FOLLOWING ADDED FEATURES
— Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
• OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue Logic and Structured Designs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control to Minimize Switching Noise
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global Interconnectivity
• ispDesignEXPERT™ – LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
— Superior Quality of Results
— Tightly Integrated with Leading CAE Vendor Tools
— Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™
— PC and UNIX Platforms -
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Datasheet
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Shopping guide
Delivery period:
- - Will ship out in 2-3 days
- - DHL Express: 3-7 business days
- - DHL eCommerce: 12-22 business days
- - FedEx International Priority: 3-7 business days
- - EMS: 10-15 business days
Shipping fee:
- - Automatic Email notification (above 5 times)
- - View in your order page
Shipping option:
DHL, FedEx, EMS, SF Express, and Registered Air MailShipping tracking:
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How to Buy:
- - In-stock, Add to cart > Check out > Submit order > Complete payment >Delivery.
- - Inquiry, Add to inquiry sheet/Submit bom/inquire file/Send email us > Quote > Place order > Complete payment >Delivery.
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Payment:
- - Paypal,Credit Card includes Visa, Master, American Express.
- - Wire transfer, include Local bank transfer.
- - Western Union.
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- Datasheet: Download ISPLSI2064E-200LT100
- Chipdatas Part: CD94-ISPLSI2064E-200LT100
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/05/20 11:47 +0800
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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The fee is charged according to the rule of PayPal.
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Western Union charge US$0.00 banking fee.
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