LCMXO1200E-4FT256C-3I - Brand New LATTICE IC Chips
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Description
Electronic Component Model: LCMXO1200E-4FT256C-3I is an optimized chip designed to meet the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs. It is suitable for a variety of tasks including glue logic, bus bridging, bus interfacing, power-up control, and control logic. This single chip combines the best features of CPLD and FPGA devices.
Specifications and features
- Non-volatile, Infinitely Reconfigurable
- Instant-on – powers up in microseconds
- Single chip, no external configuration memory required
- Excellent design security, no bit stream to intercept
- Reconfigure SRAM based logic in milliseconds
- SRAM and non-volatile memory programmable through JTAG port
- Supports background programming of non-volatile memory
- Sleep Mode allows up to 100x static current reduction
- TransFR™ Reconfiguration (TFR) enables in-field logic update while the system operates
- High I/O to Logic Density with 256 to 2280 LUT4s
- 73 to 271 I/Os with extensive package options
- Density migration supported and lead-free/RoHS compliant packaging
- Embedded and Distributed Memory with up to 27.6 Kbits sysMEM™ Embedded Block RAM and up to 7.5 Kbits distributed RAM, as well as dedicated FIFO control logic
- Flexible I/O Buffer with programmable sysIO™ buffer that supports a wide range of interfaces including LVCMOS, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, and RSDS
- sysCLOCK™ PLLs are included with up to two analog PLLs per device for clock multiply, divide, and phase shifting
- System Level Support with IEEE Standard 1149.1 Boundary Scan, onboard oscillator, and operation with 3.3V, 2.5V, 1.8V, or 1.2V power supply
- IEEE 1532 compliant in-system programming
Application Scenarios
This electronic component model can be used in various scenarios including glue logic, bus bridging, bus interfacing, power-up control, and control logic. It is suitable for applications that require high I/O to logic density, non-volatile and infinitely reconfigurable memory, and in-field logic updates.
Comparison
Advantages- Non-volatile and infinitely reconfigurable
- Instant-on power-up in microseconds
- Single chip with no external configuration memory required
- Excellent design security without a bit stream to intercept
- Supports background programming of non-volatile memory
- Sleep Mode allows for significant static current reduction
- TransFR™ Reconfiguration enables in-field logic updates
- High I/O to Logic Density with extensive package options
- Embedded and Distributed Memory
- Flexible I/O Buffer supports a wide range of interfaces
- sysCLOCK™ PLLs for clock management
- System Level Support with IEEE Standard 1149.1 Boundary Scan and in-system programming
Disadvantages- Limited IOs and LUT4s compared to higher capacity FPGAs
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Datenblatt
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Shopping guide
Delivery period:
- - Will ship out in 2-3 days
- - DHL Express: 3-7 business days
- - DHL eCommerce: 12-22 business days
- - FedEx International Priority: 3-7 business days
- - EMS: 10-15 business days
Shipping fee:
- - Automatic Email notification (above 5 times)
- - View in your order page
Shipping option:
DHL, FedEx, EMS, SF Express, and Registered Air MailShipping tracking:
- - Automatic Email notification (above 5 times)
- - View in your order page
How to Buy:
- - In-stock, Add to cart > Check out > Submit order > Complete payment >Delivery.
- - Inquiry, Add to inquiry sheet/Submit bom/inquire file/Send email us > Quote > Place order > Complete payment >Delivery.
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Payment:
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- - Wire transfer, include Local bank transfer.
- - Western Union.
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Beliebte Teile der gleichen Art
- Datasheet: Download LCMXO1200E-4FT256C-3I
- Chipdaten Teil: CD87-LCMXO1200E-4FT256C-3I
- Lagerhaus: China, Hongkong
- Versenden: Innerhalb von 24 Stunden
- Kostenloser Versand: Yes
- Bevorzugter Versand: Yes, 3-5 days
- Letzte Aktualisierung: 2024/06/29 05:18 +0800
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