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LCMXO1200E-4FT256C-3I - Brand New LATTICE IC Chips - Datasheet - Chipdatas

LCMXO1200E-4FT256C-3I - Brand New LATTICE IC Chips

In Stock:529 ,Ready for Immediate Shipping
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In Stock: 529, Ready for Immediate Shipping
Brand:LATTICE
Category:IC Chips
Chipdatas Part No.:CD87-LCMXO1200E-4FT256C-3I
Manufacturer Part No.:LCMXO1200E-4FT256C-3I
Datecode:09+
Package:BGA
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  • Description

    Electronic Component Model: LCMXO1200E-4FT256C-3I is an optimized chip designed to meet the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs. It is suitable for a variety of tasks including glue logic, bus bridging, bus interfacing, power-up control, and control logic. This single chip combines the best features of CPLD and FPGA devices.

    Specifications and features

    - Non-volatile, Infinitely Reconfigurable

    - Instant-on – powers up in microseconds

    - Single chip, no external configuration memory required

    - Excellent design security, no bit stream to intercept

    - Reconfigure SRAM based logic in milliseconds

    - SRAM and non-volatile memory programmable through JTAG port

    - Supports background programming of non-volatile memory

    - Sleep Mode allows up to 100x static current reduction

    - TransFR™ Reconfiguration (TFR) enables in-field logic update while the system operates

    - High I/O to Logic Density with 256 to 2280 LUT4s

    - 73 to 271 I/Os with extensive package options

    - Density migration supported and lead-free/RoHS compliant packaging

    - Embedded and Distributed Memory with up to 27.6 Kbits sysMEM™ Embedded Block RAM and up to 7.5 Kbits distributed RAM, as well as dedicated FIFO control logic

    - Flexible I/O Buffer with programmable sysIO™ buffer that supports a wide range of interfaces including LVCMOS, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, and RSDS

    - sysCLOCK™ PLLs are included with up to two analog PLLs per device for clock multiply, divide, and phase shifting

    - System Level Support with IEEE Standard 1149.1 Boundary Scan, onboard oscillator, and operation with 3.3V, 2.5V, 1.8V, or 1.2V power supply

    - IEEE 1532 compliant in-system programming

    Application Scenarios

    This electronic component model can be used in various scenarios including glue logic, bus bridging, bus interfacing, power-up control, and control logic. It is suitable for applications that require high I/O to logic density, non-volatile and infinitely reconfigurable memory, and in-field logic updates.

    Comparison

    Advantages

    - Non-volatile and infinitely reconfigurable

    - Instant-on power-up in microseconds

    - Single chip with no external configuration memory required

    - Excellent design security without a bit stream to intercept

    - Supports background programming of non-volatile memory

    - Sleep Mode allows for significant static current reduction

    - TransFR™ Reconfiguration enables in-field logic updates

    - High I/O to Logic Density with extensive package options

    - Embedded and Distributed Memory

    - Flexible I/O Buffer supports a wide range of interfaces

    - sysCLOCK™ PLLs for clock management

    - System Level Support with IEEE Standard 1149.1 Boundary Scan and in-system programming

    Disadvantages

    - Limited IOs and LUT4s compared to higher capacity FPGAs

  • Similar parts: 430483 , Click to view
    Attributes Value
    Category IC Chips
    Manufacturer Lattice
    Product Category IC Chips
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  • Shopping guide

    Warranty:
    • - 30-day money-back return policy,
    • - 90-day warranty against any manufacturing defects. View more
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Additional Information
  • Datasheet: Download LCMXO1200E-4FT256C-3I
  • Chipdatas Part: CD87-LCMXO1200E-4FT256C-3I
  • Warehouse: China, Hong Kong
  • Dispatch: Within 24 hours
  • Free Shipping: Yes
  • Prority Shipping: Yes, 3-5 days
  • Last Updated: 2024/06/26 09:06 +0800
Refund
    • Full Refund if you don't receive your order
    • Full or Partial Refund , If the item is not as described
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