IDT7201LA12SO - Brand New Integrated Circuit Systems FIFOs Memory
In Stock:10836 ,Ready for Immediate Shipping
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In Stock:
10836,
Ready for Immediate Shipping
Category:FIFOs Memory
Chipdatas Part No.:CD91-IDT7201LA12SO
Manufacturer Part No.:IDT7201LA12SO
Datecode:09+
Package:28-SOIC 0.345", 8.77mm Width
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Description
The IDT7201LA12SO is a type of FIFOs memory, specifically, it is a dual-port memory that loads and empties data on a first-in/first-out basis. It utilizes Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. Its read and writes are internally sequential through the use of ring pointers, with no address information required to load and unload data.
Specifications and features
- 256 x 9 organization (IDT7200)
- 512 x 9 organization (IDT7201)
- 1,024 x 9 organization (IDT7202)
- Low power consumption: Active: 770mW (max.); Power-down: 2.75mW (max.)
- Ultra high speed—12ns access time
- Asynchronous and simultaneous read and write
- Fully expandable by both word depth and/or bit width
- Pin and functionally compatible with 720X family
- Status Flags: Empty, Half-Full, Full
- Auto-retransmit capability
- Military product compliant to MIL-STD-883, Class B
- Standard Military Drawing #5962-87531, 5962-89666, 5962-89863 and 5962-89536 are listed on this function.
- Industrial temperature range (–40°C to +85°C) is available (plastic packages only)
Application Scenarios
It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B.
Comparison
Advantages- This model features a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed low to allow for retransmission from the beginning of data.
- This device utilizes a 9-bit wide data array, which allows for control and parity bits at the user’s option.
- It has a low power consumption with the active power being 770mW (max.) and power-down being 2.75mW (max.).
- Fully expandable by both word depth and/or bit width.
- It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Disadvantages- None mentioned.
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Datasheet
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Shopping guide
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Additional Information
- Datasheet: Download IDT7201LA12SO
- Chipdatas Part: CD91-IDT7201LA12SO
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 16:00 +0800
Refund
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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