Description

The RS8953B is a High-Bit-Rate Digital Subscriber Line (HDSL) channel unit designed to perform data, clock, and format conversions necessary to construct a Pulse Code Multiplexed (PCM) channel from one, two, or three HDSL channels. This IC chip is used to deliver data and clock channels that have been converted from HDSL channels, into standard T1, standard E1 or custom formats such as Nx64 kbps.

Specifications and features

• Supports All HDSL Bit Rates: 2 pair T1 standard (784 kbps), 2 pair E1 standard (1168 kbps), 3 pair E1 standard (784 kbps) and 1/2/3 pair custom (Nx64 kbps, N=2-36).
• T1/E1 Primary Rate (PCM) Channel: Connects to Conexant E1/T1 Framers, Sync/Async payload mapping, Clock recovery/jitter attenuation, PRBS/fixed test patterns, BER measurement.
• HDSL Channels: Connects to Conexant ZipWire Transceivers, Three independent serial channels, Central, remote, or repeater, Overhead (HOH) management, Programmable path delays, Error performance monitoring, Software controlled EOC and IND.
• Programmable Data Routing: PCM timeslots – HDSL payload, Drop/Insert – HDSL payload, Auxiliary – HDSL payload, PRBS/Fixed – PCM or HDSL, PCM and HDSL loopbacks.
• Intel® or Motorola® MPU interface.
• CMOS technology, 3.3 V operation.
• 68-pin PLCC or 80-pin PQFP.

Application Scenarios

The RS8953B can be used in various applications such as Full, Fractional or Multipoint T1/E1, Single and Multichannel Repeaters, Voice Pair Gain Systems, Wireless LAN/PBX, PCS, Cellular Base Station, Fiber Access/Distribution, Loop Carrier, Remote Switches, and Subscriber Line Modem.

Comparison

• Supports all HDSL bit rates and data formats.
• Connects to Conexant E1/T1 Framers and ZipWire Transceivers, helping extend the range of supported devices.
• Allows customizable data routing and loopbacks, making the RS8953B adaptable to various use cases.

• None specified.