EPC4QC100 - Brand New Intel / Altera Memory - Configuration Proms for FPGAs
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Description
The Altera enhanced configuration device EPC4QC100 is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. It consists of a configuration controller and a flash memory. The flash memory stores configuration data for systems made up of Altera FPGAs. After FPGA configuration is complete, the external flash interface allows for access to unused portions of the flash memory to store processor code or data.
Specifications and features
The EPC4QC100 has the following features:
- Enhanced configuration devices include EPC4, EPC8, and EPC16 devices
- Single-chip configuration solution for Stratix series, Cyclone series, APEX II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), Mercury, ACEX 1K, and FLEX 10K (FLEX 10KE and FLEX 10KA) devices
- Contains 4-, 8-, and 16-Mbit flash memories for configuration data storage
- On-chip decompression feature almost doubles the effective configuration density
- Standard flash die and a controller die combined into a single stacked chip package
- External flash interface supports parallel programming of flash and external processor access to unused portions of memory
- Flash memory block/sector protection capability via external flash interface
- Page mode support for remote and local reconfiguration with up to eight configurations for the entire system
- Compatible with Stratix series Remote System Configuration feature
- Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data output per DCLK cycle
- Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs
- Pin-selectable 2-ms or 100-ms power-on reset (POR) time
- Configuration clock supports programmable input source and frequency synthesis
- Multiple configuration clock sources supported (internal oscillator and external clock input pin)
- External clock source with frequencies up to 133 MHz
- Internal oscillator defaults to 10 MHz; Programmable for higher frequencies of 33, 50, and 66 MHz
- Clock synthesis supported via user programmable divide counter
- Available in the 100-pin plastic quad flat pack (PQFP) and the 88-pin Ultra FineLine BGA packages
- Vertical migration between all devices supported in the 100-pin PQFP package
- Supply voltage of 3.3 V (core and I/O)Application Scenarios
The EPC4QC100 can be used in various high-density FPGA configurations and systems where advanced configuration solutions are required.
Comparison
Advantages- Single-chip configuration solution for various FPGA devices
- Enhanced configuration density with on-chip decompression feature
- Supports byte-wide and n-bit concurrent configuration modes
- Versatile configuration clock options and sources
- Vertical migration and multiple package options availableDisadvantages- Limited supply voltage of 3.3 V
- Flash memory capacity limited to 16-Mbit -
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- Datasheet: Download EPC4QC100
- Chipdatas Part: CD90-EPC4QC100
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 08:42 +0800
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