PCA9517ADP - Brand New NXP Semiconductors Signal Buffers, Repeaters, Splitters
In Stock:44169 ,Ready for Immediate Shipping
New
RoSH Lead free
In Stock:
44169,
Ready for Immediate Shipping
Brand:NXP Semiconductors
Category:Signal Buffers, Repeaters, Splitters
Chipdatas Part No.:CD93-PCA9517ADP
Manufacturer Part No.:PCA9517ADP
Datecode:09+
Package:MSOP-8
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Description
The PCA9517ADP is a signal buffer, repeater, and splitter integrated circuit used in I2C-bus or SMBus applications. It provides level shifting between low voltage and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. It also permits extension of the I2C-bus by providing bidirectional buffering for both the data and the clock lines, thus enabling two buses of 400 pF.
Specifications and Features
- 5 V tolerant I2C-bus and enable pins
- 0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater)
- ESD protection exceeds 5500 V HBM per JESD22-A114, 450 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
- Packages offered: SO8 and TSSOP8
- 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device
- Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
- Footprint and functional replacement for PCA9515/15A
- I2C-bus and SMBus compatible
- Active HIGH repeater enable input
- Open-drain input/outputs
- Lock-up free operation
- Supports arbitration and clock stretching across the repeater
- Accommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters
- Powered-off high-impedance I2C-bus pins
- Port A operating supply voltage range of 0.9 V to 5.5 V
- Port B operating supply voltage range of 2.7 V to 5.5 V
Application Scenarios
The PCA9517ADP can be used in various I2C-bus or SMBus applications that require level shifting and buffering. It can be used to isolate two halves of a bus for both voltage and capacitance, enabling the system designer to extend the I2C-bus by providing bidirectional buffering for both the data and the clock lines.
Comparison
Advantages- Provides level shifting between low voltage and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications
- Bidirectional buffering for both the data and the clock lines enables two buses of 400 pF
- Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
- I2C-bus and SMBus compatible
- Supports arbitration and clock stretching across the repeater
Disadvantages- The static offset design of the port B PCA9517A I/O drivers prevent them from being connected to another device that has rise time accelerator
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Additional Information
- Datasheet: Download PCA9517ADP
- Chipdatas Part: CD93-PCA9517ADP
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/10/01 15:00 +0800
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