AT17LV002-10SU - Brand New Intel / Altera Memory - Configuration Proms for FPGAs
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Brand:Intel / Altera
Chipdatas Part No.:CD91-AT17LV002-10SU
Manufacturer Part No.:AT17LV002-10SU
Datecode:09+
Package:20-SOIC 0.295", 7.50mm Width
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Description
The AT17LV002-10SU is part of the AT17LV series FPGA Configuration EEPROMs. These EEPROMs provide an easy-to-use and cost-effective configuration memory for Field Programmable Gate Arrays (FPGAs). They are available in various package options, including 8-lead LAP, PDIP, SOIC, 20-lead PLCC, and 44-lead TQFP. The AT17LV002-10SU uses a simple serial-access procedure to configure one or more FPGA devices. Additionally, it supports a write-protection mechanism within its programming mode. These Configurators can be programmed with industry-standard programmers or Atmel's programming kits.
Specifications and features
- Programmable memory sizes: 65,536 x 1-bit, 131,072 x 1-bit, 262,144 x 1-bit, 524,288 x 1-bit, 1,048,576 x 1-bit, 2,097,152 x 1-bit, and 4,194,304 x 1-bit
- Compatible with 3.3V and 5.0V operating voltage applications
- In-System Programmable (ISP) via Two-Wire Bus
- Simple interface to SRAM FPGAs
- Compatible with Atmel AT6000, AT40K, and AT94K devices, Altera FLEX, APEX devices, ORCA, Xilinx XC3000, XC4000, XC5200, Spartan, and Virtex FPGAs
- Cascadable read-back to support additional configurations or higher-density arrays
- Low-power CMOS EEPROM process
- Programmable reset polarity
- Available in various package options
- Emulation of Atmel's AT24CXXX Serial EEPROMs
- Low-power standby mode
- High-reliability with endurance: 100,000 write cycles and data retention: 90 years for industrial parts and 190 years for commercial parts
- Green (Pb/Halide-free/RoHS Compliant) Package Options Available
Application Scenarios
- Configuration of Field Programmable Gate Arrays (FPGAs)
- Memory storage for FPGA configuration programs
Comparison
Advantages- Cost-effective configuration memory for FPGAs
- Supports multiple memory sizes
- Compatible with various operating voltage applications
- In-System Programmable (ISP) via Two-Wire Bus
- Simple interface to SRAM FPGAs
- Compatible with multiple FPGA brands
- Supports cascading for additional configurations or higher-density arrays
- Low-power operation and standby mode
- High-reliability with long endurance and data retention
Disadvantages- Requires programming equipment or kits for configuration
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Additional Information
- Datasheet: Download AT17LV002-10SU
- Chipdatas Part: CD91-AT17LV002-10SU
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/13 08:08 +0800
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