MT46H16M16LFBF-6IT:H - Brand New Micron Technology Inc. Memory
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General Description
The 256Mb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM. On the x16 device, each of the 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits. On the x32 device, eachof the 67,108,864-bit banks is organized as 4,096 rows by 512 columns by 32 bits.
Features
•VDD/VDDQ = 1.70–1.95V
• Bidirectional data strobe per byte of data (DQS)
• Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center aligned with data for WRITEs
• Four internal banks for concurrent operation
• Data masks (DM) for masking write data—one mask per byte
• Programmable burst lengths: 2, 4, or 8
• Concurrent auto precharge option supported
• Auto refresh and self refresh modes
• 1.8V LVCMOS compatible inputs
• On-chip temperature sensor to control self refresh rate
• Partial-array self refresh (PASR)
• Deep power-down (DPD)
• Selectable output drive (DS)
• Clock stop capability
• 64ms refresh period -
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Datasheet
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Shopping guide
Delivery period:
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Popular parts of the same kind
- Datasheet: Download MT46H16M16LFBF-6IT:H
- Chipdatas Part: CD94-MT46H16M16LFBF-6IT:H
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 14:43 +0800
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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