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GENERAL DESCRIPTION
The TDA9141 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor. The TDA9141 has been designed for use with baseband chrominance delay lines, and has a combined subcarrier frequency/comb filter enable signal for communication with a PAL comb filter.
The IC can process CVBS signals and Y/C input signals. The input signal is available on an output pin, in the event of a Y/C signal, it is added into a CVBS signal. The sync processor provides a two-level sandcastle, a horizontal pulse (CLP or HApulse, bus selectable) and a vertical (VA) pulse. When the HApulse is selected a line-locked clock (LLC) signal is available at the output port
pin.FEATURES
• Multistandard PAL, NTSC and SECAM
• I2C-bus controlled
• I2C-bus addresses can be selected by hardware
• Alignment free
• Few external components
• Designed for use with baseband delay lines
• Integrated video filters
• CVBS or YC input with automatic detection
• CVBS output
• Vertical divider system
• Two-level sandcastle signal
• VAsynchronization pulse (3-state)
• HAsynchronization pulse or clamping pulse CLP input/output
• Line-locked clock output or stand-alone I2C-bus output port
• Stand-alone I2C-bus input/output port
• Colour matrix and fast YUV switch
• Comb filter enable input/output with subcarrier frequency. -
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Datasheet
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- Last Updated: 2024/09/08 09:14 +0800
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