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MC100EP195MNG - Brand New onsemi Delay Lines - Datasheet - Chipdatas
MC100EP195MNG

MC100EP195MNG - Brand New onsemi Delay Lines

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Brand:onsemi
Category:Delay Lines
Chipdatas Part No.:CD83-MC100EP195MNG
Manufacturer Part No.:MC100EP195MNG
Datecode:09+
Package:QFN-325x5
$15.65450 /pcs Each tube contains 74 pcs
≥1:
$15.65450
≥10:
$15.49795
≥50:
$15.34141
≥100:
$14.87177
Numbers (pcs) :
  • NECL/PECL 输入转换。延迟部分由一个可编程的门极和多路复用器矩阵组成（如数据表逻辑图所示）。EP195 延迟增量的可数字选择分辨率约为 10 ps，最高 10.2 ns。10 个数据选择输入 D(0:9) 由锁存启用 (LEN) 控制上的高电平信号锁存在芯片上，通过这些数据选择输入 D 即可选择所需的延迟。MC10/100EP195 是一款可编程延迟芯片 (PDC)，主要用于时钟去摆和计时调节。它具有一个差分可变延迟。与 D0 (LSB) 到 D9 (MSB) 相关的可变抽头数对应的大致延迟值如数据表所示。由于 EP195 设计为使用多路复用器链条，因此它具有 2.2 ns 的固定最小延迟。提供一个附加引脚 D10，用于级联多个 PDC，从而扩大可编程范围。级联逻辑允许完全控制多个 PDC。通过 CMOS、ECL 或 TTL 电平信号的 VEF（引脚 7）和 VCF（引脚 8）之间的互联组合，可对选择输入引脚 D0-D10 的阈值进行控制。对于 CMOS 输入电平，请将 VCF 和 VEF 保持开路。对于 ECL 运行，请将 VCF 和 VEF （引脚 7 和 8）保持短路。对于 TTL 电平运行，请将一个 1.5 V 参考电源连接至 VCF，并将 VEF 引脚保持开路。可在 VCF 和 VEE 之间放置 1.5 kΩ 或 500 Ω 电阻，分别用于 3.3 V 或 5.0 V 电源，从而让 VCF 引脚的参考电压达到 1.5 V。VBB 引脚作为内部产生的电源，仅可用于该器件。对于单端输入情况，将未使用的差分输入连接至 VBB，作为开关参考电压。VBB 还可重新偏置交流耦合输入。使用时，通过 0.01 F 电容器对 VBB 和 VCC 进行去耦合，并将源/汲电流限制为 0.5 mA。
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    Category Delay Lines
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    Warranty:
    • - 30-day money-back return policy,
    • - 90-day warranty against any manufacturing defects. View more
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Additional Information
  • Datasheet: Download MC100EP195MNG
  • Chipdatas Part: CD83-MC100EP195MNG
  • Warehouse: China, Hong Kong
  • Dispatch: Within 24 hours
  • Free Shipping: Yes
  • Prority Shipping: Yes, 3-5 days
  • Last Updated: 2024/06/03 04:33 +0800
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