74AHC595PW,118 - Brand New NXP Semiconductors Shifting Register
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Description
The 74AHC/AHCT595 is a shifting register that belongs to the high-speed Si-gate CMOS devices and is pin compatible with Low power Schottky TTL (LSTTL). It follows the JEDEC standard No. 7A and is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register has separate clocks. Data is shifted on the positive-going transitions of the SHCP input, and the data in each register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
Specifications and features
ESD protection: The ESD protection of the product exceeds 2000 V HBM EIA/JESD22-A114-A, 200 V MM EIA/JESD22-A115-A, and 1000 V CDM EIA/JESD22-C101. The product has balanced propagation delays. All inputs have Schmitt-trigger actions, and inputs accept voltages higher than VCC. The product operates with CMOS input levels for AHC levels and TTL input levels for AHCT.
Application Scenarios
The 74AHC/AHCT595 is applicable in serial-to-parallel data conversion scenarios and remote control holding register.
Comparison
Advantages- Pin compatible with Low power Schottky TTL (LSTTL)
- Has balanced propagation delays
- Inputs have Schmitt-trigger actions
Disadvantages- None observed
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Datasheet
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- Datasheet: Download 74AHC595PW,118
- Chipdatas Part: CD92-74AHC595PW,118
- Warehouse: China, Hong Kong
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- Last Updated: 2024/05/23 03:20 +0800
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