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INTRODUCTION
The MC68020 is the first full 32-bit implementation of the M68000 family of microprocessors from Motorola. Using VLSI technology, the MC68020 is implemented with 32-bit registers and data paths, 32-bit addresses, a rich instruction set, and versatile addressing modes.
The MC68020 is object-code compatible with earlier members of the M68000 family and has the added features of new addressing modes in support of high- level languages, an on-chip instruction cache, and a flexible coprocessor interface with full IEEE floating-point support (the MC68881 and MC68882). The internal operations of this microprocessor operate in parallel, allowing multiple instructions to be executed concurrently.
The asynchronous bus structure of the MC68020 uses a nonmultiplexed bus with 32 bits of address and 32 bits of data. The processor supports a dynamic bus sizing mechanism that allows the processor to transfer operands to or from external devices while automatically determining device port size on a cycle- by-cycle basis. The dynamic bus interface allows access to devices of differing data bus widths, in addition to eliminating all data alignment restrictions.FEATURES
The main features of the MC68020/EC020 are as follows:
• Object-Code Compatible with Earlier M68000 Microprocessors
• Addressing Mode Extensions for Enhanced Support of High-Level Languages
• New Bit Field Data Type Accelerates Bit-Oriented Applications—e.g., Video Graphics
• An On-Chip Instruction Cache for Faster Instruction Execution
• Coprocessor Interface to Companion 32-Bit Peripherals—the MC68881 and
MC68882 Floating-Point Coprocessors and the MC68851 Paged Memory
Management Unit
• Pipelined Architecture with High Degree of Internal Parallelism Allowing Multiple
Instructions To Be Executed Concurrently
• High-Performance Asynchronous Bus Is Nonmultiplexed and Full 32 Bits
• Dynamic Bus Sizing Efficiently Supports 8-/16-/32-Bit Memories and Peripherals
• Full Support of Virtual Memory and Virtual Machine
• Sixteen 32-Bit General-Purpose Data and Address Registers
• Two 32-Bit Supervisor Stack Pointers and Five Special-Purpose Control Registers
• Eighteen Addressing Modes and Seven Data Types
• 4-Gbyte Direct Addressing Range for the MC68020
• 16-Mbyte Direct Addressing Range for the MC68EC020
• Selection of Processor Speeds for the MC68020: 16.67, 20, 25, and 33.33 MHz
• Selection of Processor Speeds for the MCEC68020: 16.67 and 25 MHz -
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