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Description
The QC100 model is an enhanced configuration device from Altera, which is a high-speed and advanced configuration solution suitable for very high-density Field Programmable Gate Arrays (FPGAs). This device comprises a configuration controller and a flash memory, with the flash memory used for storing configuration data for systems made up of one or more Altera FPGAs. The flash memory can also be used to store processor code or data, which can be accessed via the external flash interface after the FPGA configuration is complete.
Specifications and features
The following are the specifications and features of the QC100 model:
- Enhanced configuration devices include EPC4, EPC8, and EPC16 devices.
- Single-chip configuration solution for Stratix® series, Cyclone™ series, APEX™ II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), Mercury™, ACEX® 1K, and FLEX® 10K (FLEX 10KE and FLEX 10KA) devices.
- Contains 4-, 8-, and 16-Mbit flash memories for configuration data storage.
- On-chip decompression feature almost doubles the effective configuration density.
- Standard flash die and a controller die combined into a single stacked chip package.
- External flash interface supports parallel programming of flash and external processor access to unused portions of memory.
- Flash memory block/sector protection capability via external flash interface.
- Page mode support for remote and local reconfiguration with up to eight configurations for the entire system.
- Compatible with Stratix series Remote System Configuration feature.
- Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data output per DCLK cycle.
- Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs.
- Pin-selectable 2-ms or 100-ms power-on reset (POR) time.
- Configuration clock supports programmable input source and frequency synthesis.
- Multiple configuration clock sources supported (internal oscillator and external clock input pin).
- External clock source with frequencies up to 133 MHz.
- Available in the 100-pin plastic quad flat pack (PQFP) and the 88-pin Ultra FineLine BGA® packages.
- Vertical migration between all devices supported in the 100-pin PQFP package.
- Supply voltage of 3.3 V (core and I/O).
Application Scenarios
The QC100 model is commonly used in systems that require high-density FPGAs, such as telecommunications, networking, and industrial automation.
Comparison
Advantages- The on-chip decompression feature almost doubles the effective configuration density.
- The device supports multiple configuration clock sources including an external clock source with frequencies up to 133 MHz.
- The page mode support allows for remote and local reconfiguration with up to eight configurations for the entire system
Disadvantages- The QC100 is only compatible with Altera FPGAs.
- The device is only available in the 100-pin plastic quad flat pack (PQFP) and the 88-pin Ultra FineLine BGA® packages, limiting the options for device packaging.
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Datenblatt
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Shopping guide
Delivery period:
- - Will ship out in 2-3 days
- - DHL Express: 3-7 business days
- - DHL eCommerce: 12-22 business days
- - FedEx International Priority: 3-7 business days
- - EMS: 10-15 business days
Shipping fee:
- - Automatic Email notification (above 5 times)
- - View in your order page
Shipping option:
DHL, FedEx, EMS, SF Express, and Registered Air MailShipping tracking:
- - Automatic Email notification (above 5 times)
- - View in your order page
How to Buy:
- - In-stock, Add to cart > Check out > Submit order > Complete payment >Delivery.
- - Inquiry, Add to inquiry sheet/Submit bom/inquire file/Send email us > Quote > Place order > Complete payment >Delivery.
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Payment:
- - Paypal,Credit Card includes Visa, Master, American Express.
- - Wire transfer, include Local bank transfer.
- - Western Union.
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Beliebte Teile der gleichen Art
- Datasheet: Download QC100
- Chipdaten Teil: CD89-QC100
- Lagerhaus: China, Hongkong
- Versenden: Innerhalb von 24 Stunden
- Kostenloser Versand: Yes
- Bevorzugter Versand: Yes, 3-5 days
- Letzte Aktualisierung: 2024/06/03 09:47 +0800
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