CY7C1351G-100BGXC - Brand New Cypress Semiconductor IC Chips
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Functional Description[1]
The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data through the SRAM, especially in systems that require frequent Write-Read transitions.
Features
• Can support up to 133-MHz bus operations with zero wait states
— Data is transferred on every clock
• Pin compatible and functionally equivalent to ZBT™ devices
• Internally self-timed output buffer control to eliminate the need to use OE
• Registered inputs for flow-through operation
• Byte Write capability
• 128K x 36 common I/O architecture
• 2.5V/3.3V I/O power supply (VDDQ)
• Fast clock-to-output times
— 6.5 ns (for 133-MHz device)
• Clock Enable (CEN) pin to suspend operation
• Synchronous self-timed writes
• Asynchronous Output Enable
• Available in lead-free 100-Pin TQFP package, lead-free and non-lead-free 119-Ball BGA package
• Burst Capability—linear or interleaved burst order
• Low standby power -
Similar parts: 430483 , Click to view
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Datasheet
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Popular parts of the same kind
- Datasheet: Download CY7C1351G-100BGXC
- Chipdatas Part: CD94-CY7C1351G-100BGXC
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 14:03 +0800
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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