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Description
The ICSI IC41C1664 and IC41LV1664 are high-performance CMOS Dynamic Random Access Memories with a capacity of 65,536 x 16 bits. They offer an accelerated cycle access called EDO Page Mode, allowing 256 random accesses within a single row with an access cycle time as short as 10 ns per 16-bit word. These features make them ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IC41C1664 is packaged in a 40-pin 400mil SOJ and 400mil TSOP-2.
Specifications and Features
- Extended Data-Out (EDO) Page Mode access cycle
- TTL compatible inputs and outputs; tristate I/O
- Refresh Interval: 256 cycles /4 ms
- Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden
- Single power supply:
- 5V ± 10% (IC41C1664)
- 3.3V ± 10% (IC41LV1664)
- Byte Write and Byte Read operation via two CAS
- Industrial Temperature Range -40°C to 85°C
Application Scenarios
The IC41C82052S-50J is suitable for use in 16-bit, 32-bit wide data bus systems, such as high-performance computing systems, graphics applications, digital signal processing, and peripheral devices.
Comparison
Advantages- High-performance CMOS Dynamic Random Access Memory
- Offers EDO Page Mode for accelerated cycle access
- Ideal for high-bandwidth graphics and digital signal processing
- TTL compatible inputs and outputs
- Industrial Temperature Range -40°C to 85°C
Disadvantages- Available only in a 40-pin 400mil SOJ and 400mil TSOP-2 package
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Similar parts: 430483 , Click to view
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Datasheet
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Popular parts of the same kind
- Datasheet: Download IC41C82052S-50J
- Chipdatas Part: CD89-IC41C82052S-50J
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/10/01 17:08 +0800
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