Description

The TLC551CDR is an electronic component model in the IC Chips product category. It is a Subscriber line interface card controller for Central Office, Central Exchange, NT2, and PBX. It has the capability to handle 16 U Interfaces, 2 Megabits line interface cards, 16 SLICs (Plain Old Telephone Service), mixed analog and digital interfaces (SLICs or U Interfaces), and 16 S Interfaces. This model features a switching network with centralized processing.

It also has 32 TxHDLCs with broadcasting capability and/or CSMA/CR function with automatic restart in case of TX frame abort. It includes 32 RxHDLCs with address recognition, 16 command/indicate channels (4 or 6-bit primitive), and 16 monitor channels processed in accordance with GCI or V*. The switching matrix is 256 x 256 without blocking and with time slot sequence integrity and loopback per bidirectional connection.

The TLC551CDR has a DMA controller for 32 Tx channels and 32 Rx channels, capable of handling a mix of LAPD, LAPB, SS7, CAS, and proprietary signalings. It also has external shared memory access between the DMA controller and microprocessor. The model utilizes a single memory shared between n x multi-HDLCs and a single microprocessor, allowing it to handle n x 32 channels. It supports bus arbitration and provides an interface for various 8, 16 or 32-bit microprocessors.

The RAM controller allows interfacing with up to 16 megabytes of dynamic RAM or 1 megabyte of static RAM, while the interrupt controller automatically stores events in shared memory. The TLC551CDR comes in a PQFP160 package.

Specifications and features

• Product Category: IC Chips
• Model: TLC551CDR
• Subscriber line interface card controller
• Capable of handling 16 U Interfaces, 2 Megabits line interface cards, 16 SLICs, mixed analog and digital Interfaces, and 16 S Interfaces
• Switching Network with centralized processing
• 32 TxHDLCs with broadcasting capability and/or CSMA/CR function with automatic restart
• 32 RxHDLCs with address recognition
• 16 command/indicate channels (4 or 6-bit primitive)
• 16 monitor channels processed in accordance with GCI or V*
• 256 x 256 switching matrix without blocking and with time slot sequence integrity and loopback per bidirectional connection
• DMA controller for 32 Tx channels and 32 Rx channels
• Capable of handling a mix of LAPD, LAPB, SS7, CAS, and proprietary signalings
• External shared memory access between the DMA controller and microprocessor
• Single memory shared between n x multi-HDLCs and single microprocessor
• Bus arbitration
• Interface for various 8, 16 or 32-bit microprocessors
• RAM controller allows interfacing up to 16 megabytes of dynamic RAM or 1 megabyte of static RAM
• Interrupt controller to store automatically events in shared memory
• PQFP160 package

Application Scenarios

The TLC551CDR electronic component model can be used in various scenarios such as Central Office, Central Exchange, NT2, and PBX systems. It is suitable for applications that require handling multiple interfaces, such as U Interfaces, Megabits line interface cards, SLICs, mixed analog and digital Interfaces, and S Interfaces. The model's switching network with centralized processing provides efficient and reliable communication.

Comparison

• Can handle a wide range of interfaces
• Switching network with centralized processing for efficient communication
• DMA controller for efficient data transfer
• External shared memory access for enhanced performance
• Supports various microprocessors

• Package size may not be suitable for all applications
• Requires additional components for full functionality