EPJ4-SH-6A-D1 - Brand New IC Chips
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Product Details
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This specification describes the Bt8110 and Bt8110B multichannel ADPCM processor CMOS integrated circuits that implement Adaptive Differential Pulse- Code Modulation (ADPCM) encoding and decoding. The fixed-rate coding algorithms include those specified in ANSI Standard T1.303-1989. These algorithms are identical to those in ITU-T Recommendations G.726 and G.727. These circuits also implement the variable-rate or embedded codes specified in ANSI Standard T1.310-1991 and ITU-T Recommendation G.727.
Distinguishing Features
• Bt8110B offers internal ROM
• 24 or 32 full-duplex channel capacity (48 or 64 channels with two processors)
• 2-, 3-, 4- and 5-bit quantization dynamically selectable on a channel-by- channel, frame-by-frame basis
• Transparent channel operation
• Two control modes available: microprocessor and hardware.
• Direct framer interface for both T1 and E1 signal formats
• Supports the optimal RESET function described in the algorithm standards
• Supports even-bit inversion of A-law inputs and outputs (required by ITU-T Recommendations G.726, and G.727)
• Minimum throughput delay
• Pin compatible with Bt8110
• 8 mw per-channel, low-power CMOSApplications
• T1/E1 Transcoders
• T1/E1 Multiplexers
• Personal Communications Systems: Digital European Cordless Telecommunications (DECT), Personal Access Communications System (PACS)
• Wireless Local Loop
• Voice PairGain
• DCME Systems
• Speech Processing/Recording
• Voice Mail/Packetization
• Voice over ATM/Frame Relay -
Similar parts: 430483 , Click to view
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Datasheet
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- Datasheet: Download EPJ4-SH-6A-D1
- Chipdatas Part: CD94-EPJ4-SH-6A-D1
- Warehouse: China, Hong Kong
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- Last Updated: 2024/06/13 01:50 +0800
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