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T8105BAL3 - Brand New Lucent IC Chips - Datasheet - Chipdatas

T8105BAL3 - Brand New Lucent IC Chips

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In Stock: 464, Ready for Immediate Shipping
Brand:Lucent
Category:IC Chips
Chipdatas Part No.:CD94-T8105BAL3
Manufacturer Part No.:T8105BAL3
Datecode:09+
Package:BGA
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  • Description

    This advisory describes a flaw in some devices that the initial factory test program did not detect. The flaw exists in some version 2 and version 3 T8100A, T8102, and T8105 devices in both the SQFP and BGA package types. An enhanced factory test program has been in place since January 2000, and all devices shipped after this date are good devices.

    These products in the Ambassador T8100 family provide a complete time-slot switch and an interface for the H.100/H.110 time-division multiplexed (TDM) buses. The T8100 family includes devices with hierarchical switching as well as a capacity of up to 512 local to H.100 connections. The hierarchical switching allows up to 1024 local connections without using H.100 bus bandwidth. The family also includes the T8102 device for a low-cost solution in non-hierarchical systems.

    Specifications and features

    • Complete solution for interfacing board-level circuitry to the H.100 telephony bus
    • H.100 compliant interface; all mandatory signals
    • Programmable connections to any of the 4096 time slots on the H.100 bus
    • Up to 16 local serial inputs and 16 local serial outputs, programmable for 2.048 Mbits/s, 4.096 Mbits/s, and 8.192 Mbits/s operation per CHI specifications
    • Programmable switching between local time slots, up to 1024 connections
    • Subrate switching of nibbles, dibits, or bits
    • Backward compatible to T8100 through software
    • Programmable switching between local time slots and H.100 bus, up to 512 (T8102, T8105 only) connections
    • Choice of frame integrity or minimum latency switching on a per-time-slot basis
      • Frame integrity to ensure proper switching of wideband data
      • Minimum latency switching to reduce delay in voice channels
    • On-chip phase-locked loop (PLL) for H.100, MVIP*, or SC-Bus clock operation in master or slave clock modes
    • Serial TDM bus rate and format conversion between most standard buses
    • Optional 8-bit parallel input and/or 8-bit parallel output for local TDM interfaces
    • High-performance microprocessor interface
      • Provides access to device configuration registers and to time-slot data
      • Supports both Motorola† nonmultiplexed and Intel‡ multiplexed/nonmultiplexed modes
    • Two independently programmable groups of up to 12 framing signals each
    • Devices available in 0.25 micron technology
    • 3.3 V supply with 5 V tolerant inputs and TTL-compatible outputs
    • Boundary-scan testing support
    • 208-pin, plastic SQFP package
    • 217-ball BGA package (industrial temperature range)

    Application Scenarios

    This model, T8105BAL3, is specifically designed for interfacing board-level circuitry to the H.100 telephony bus. It is suitable for applications that require time-division multiplexing (TDM) on H.100/H.110 buses. It provides a complete time-slot switch and supports hierarchical switching, allowing for up to 1024 local connections without using H.100 bus bandwidth. The T8105BAL3 is compatible with both the SQFP and BGA package types.

    Comparison

    Advantages
    • Complete solution for interfacing board-level circuitry to the H.100 telephony bus
    • H.100 compliant interface
    • Programmable connections to any of the 4096 time slots on the H.100 bus
    • Supports up to 16 local serial inputs and outputs
    • Programmable switching between local time slots, up to 1024 connections
    • Backward compatible to T8100 through software
    • Choice of frame integrity or minimum latency switching
    • On-chip phase-locked loop (PLL) for clock operation
    • Serial TDM bus rate and format conversion
    • Optional 8-bit parallel input and/or output for local TDM interfaces
    • High-performance microprocessor interface
    • Two independently programmable groups of framing signals
    • Devices available in 0.25 micron technology
    • 5 V tolerant inputs and TTL-compatible outputs
    • Boundary-scan testing support
    • Comes in both SQFP and BGA package types
    Disadvantages
    • The flaw in some devices that the initial factory test program did not detect
    • Flaw exists in some version 2 and version 3 T8100A, T8102, and T8105 devices
    • Only supports up to 512 connections between local time slots and H.100 bus for T8102 and T8105 devices
  • Similar parts: 430483 , Click to view
    Attributes Value
    Category IC Chips
    Manufacturer Lucent
    Product Category IC Chips
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Additional Information
  • Datasheet: Download T8105BAL3
  • Chipdatas Part: CD94-T8105BAL3
  • Warehouse: China, Hong Kong
  • Dispatch: Within 24 hours
  • Free Shipping: Yes
  • Prority Shipping: Yes, 3-5 days
  • Last Updated: 2024/06/03 13:35 +0800
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    • Full or Partial Refund , If the item is not as described
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