74LVC273DB,112 - Brand New Nexperia Flip Flops
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Description
The 74LVC273DB,112 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. It belongs to the Flip Flops product category. The device features eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.
Specifications and Features
- Product Category: Flip Flops
- Supply Voltage Range: 1.2V to 3.6V
- JEDEC Standard: 8-1A
- Acceptable Input Voltage Range: Up to 5.5V
- Low Power Consumption: CMOS
- Direct Interface with TTL Levels
- Output Drive Capability: 50Ω transmission lines @ 85°C
Application Scenarios
The 74LVC273DB,112 is ideal for applications where there is a need for eight edge-triggered flip-flops with individual D inputs and Q outputs. It is especially useful in scenarios where the true output only is needed and the clock and master reset are common to all storage elements.
Comparison
Advantages- Wide Supply Voltage Range
- Low Power Consumption
- Direct Interface with TTL Levels
Disadvantages- Output Drive Capability is Limited to 50Ω transmission lines @ 85°C
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Datasheet
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Shopping guide
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- Datasheet: Download 74LVC273DB,112
- Chipdatas Part: CD83-74LVC273DB,112
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 11:50 +0800
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- Full or Partial Refund , If the item is not as described
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