GENERAL DESCRIPTION

The MX29LV320AT/B is a 32-mega bit Flash memory organized as 4M bytes of 8 bits and 2M words of 16 bits. MXIC's Flash memories offer the most cost- effective and reliable read/write non-volatile random access memory. The MX29LV320AT/B is packaged in 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

FEATURES

GENERAL FEATURES
• 4,194,304 x 8 / 2,097,152 x 16 switchable
• Sector Structure
- 8K-Byte x 8 and 64K-Byte x 63
• Extra 64K-Byte sector for security
- Features factory locked and identifiable, and customer lockable
• Twenty-Four Sector Groups
- Provides sector group protect function to prevent program or erase operation in the protected sector group
- Provides chip unprotect function to allow code changing
- Provides temporary sector group unprotect function for code changing in previously protected sector groups
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 250mA from -1V to Vcc + 1V
• Low Vcc write inhibit is equal to or less than 1.4V
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
• 2nd generation of 3V/32M Flash product
- Fully compatible with MX29LV320T/B device

PERFORMANCE

• High Performance
- Fast access time: 70/90ns
- Fast program time: 7us/word typical utilizing accelerate function
- Fast erase time: 0.9s/sector, 35s/chip (typical)
• Low Power Consumption
- Low active read current: 10mA (typical) at 5MHz
- Low standby current: 200nA (typical)
• Minimum 100,000 erase/program cycle
• 10 years data retention

SOFTWARE FEATURES

• Erase Suspend/ Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being
erased
• Status Reply
- Data polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)

HARDWARE FEATURES

• Ready/Busy (RY/BY) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET) Input
- Provides a hardware method to reset the internal state machine to read mode
• WP/ACC input pin
- Provides accelerated program capability

PACKAGE

• 48-Pin TSOP
• 48-Ball CSP