IDT2309-1HPG - Brand New Integrated Circuit Systems Clock Generators / Frequency Synthesizers / PLL
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Description
The IDT2309-1HPG is a high-speed phase-lock loop (PLL) clock buffer designed for high-speed clock distribution applications. It achieves zero delay by aligning the phase between the incoming clock and the output clock. It operates within the frequency range of 10 to 133MHz and is a 16-pin version of the IDT2305. The IDT2309-1HPG accepts one reference input and drives two banks of four low skew clocks. It has higher drive than the IDT2309-1 device, operating at frequencies up to 133MHz. It features an on-chip PLL that locks to the input clock and provides a feedback on the CLKOUT pad. The IDT2309-1HPG enters power down mode and tri-states the outputs when there is no input clock, consuming less than 25µA in this mode. It is characterized for both industrial and commercial operation.
Specifications and features
- Phase-Lock Loop Clock Distribution
- Operating frequency: 10MHz to 133MHz
- Distributes one clock input to one bank of five and one bank of four outputs
- Separate output enable for each output bank
- Output Skew < 250ps
- Low jitter < 200ps cycle-to-cycle
- IDT2309-1 for standard drive
- IDT2309-1H for high drive
- No external RC network required
- Operates at 3.3V VDD
- Available in SOIC and TSSOP packagesApplication Scenarios
- SDRAM
- Telecom
- Datacom
- PC Motherboards/Workstations
- Critical Path Delay DesignsComparison
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Datasheet
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Popular parts of the same kind
- Datasheet: Download IDT2309-1HPG
- Chipdatas Part: CD93-IDT2309-1HPG
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 09:24 +0800
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- Full Refund if you don't receive your order
- Full or Partial Refund , If the item is not as described
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