Description

The MPC566AZP56 is an electronic component model in the microcontroller product category. It features the e200z4 host processor core built on Power Architecture technology, designed specifically for embedded applications. The core supports instructions for digital signal processing (DSP). The microcontroller has a memory hierarchy consisting of 8 KB instruction cache, 192 KB on-chip SRAM, and 4 MB internal flash memory. It also includes an external bus interface and a calibration bus for use with the Freescale VertiCal Calibration System.

Specifications and features

• 150 MHz e200z4 Power Architecture core
• Variable length instruction encoding (VLE)
• Superscalar architecture with 2 execution units
• Up to 2 integer or floating point instructions per cycle
• Up to 4 multiply and accumulate operations per cycle
• 4 MB on-chip flash memory with ECC and Read While Write (RWW)
• 192 KB on-chip SRAM with standby functionality (32 KB) and ECC
• 8 KB instruction cache (with line locking), configurable as 2- or 4-way
• 14 + 3 KB eTPU code and data RAM
• 5 x 4 crossbar switch (XBAR)
• 24-entry MMU
• External Bus Interface (EBI) with slave and master port
• 16-entry Memory Protection Unit (MPU)
• CRC unit with 3 sub-modules
• Junction temperature sensor
• Configurable interrupt controller (with NMI)
• 64-channel DMA
• 3 x eSCI
• 3 x DSPI (2 of which support downstream Micro Second Channel [MSC])
• 3 x FlexCAN with 64 messages each
• 1 x FlexRay module (V2.1) up to 10 Mbit/s with dual or single channel and 128 message objects and ECC
• 1 x eMIOS: 24 unified channels
• 1 x eTPU2 (second generation eTPU)
• 32 standard channels
• 1 x reaction module (6 channels with three outputs per channel)
• 2 enhanced queued analog-to-digital converters (eQADCs)
• Forty 12-bit input channels (multiplexed on 2 ADCs); expandable to 56 channels with external multiplexers
• 6 command queues
• Trigger and DMA support
• 688 ns minimum conversion time
• On-chip CAN/SCI/FlexRay Bootstrap loader with Boot Assist Module (BAM)
• Nexus: Class 3+ for the e200z4 core, Class 1 for the eTPU
• JTAG (5-pin)
• Development Trigger Semaphore (DTS) with register of semaphores (32-bits) and an identification register
• Used as part of a triggered data acquisition protocol
• EVTO pin is used to communicate to the external tool
• Clock generation: On-chip 4–40 MHz main oscillator, On-chip FMPLL (frequency-modulated phase-locked loop)
• Up to 120 general purpose I/O lines, individually programmable as input, output, or special function, with programmable threshold (hysteresis)
• Power reduction mode: slow, stop, and stand-by modes
• Flexible supply scheme: 5 V single supply with external ballast, multiple external supply options (5 V, 3.3 V, and 1.2 V)
• Packages: 176 LQFP, 208 MAPBGA, 324 TEPBGA, 496-pin CSP (calibration tool only)

Application Scenarios

The MPC566AZP56 microcontroller is commonly used in embedded systems where efficient processing power, memory hierarchy, and various communication interfaces are required. It is suitable for applications such as automotive electronics, industrial control systems, consumer electronics, and more.

Comparison

• Powerful e200z4 Power Architecture core
• DSP instruction support for digital signal processing
• Ample on-chip memory (8 KB instruction cache, 192 KB on-chip SRAM, 4 MB internal flash memory)
• Multiple communication interfaces (eSCI, DSPI, FlexCAN, FlexRay)
• Enhanced queued analog-to-digital converters (eQADCs) for precise analog measurements
• Flexible supply scheme for different voltage requirements

• Large selection of pin packages may require different PCB layout considerations
• 496-pin CSP package is only compatible with the calibration tool