Description

The STPMS2H-PUR is a sensor and detector interface electronic component model. It integrates a standard 5th generation x86 core, a Synchronous DRAM controller, a graphics subsystem, a video pipeline, and support logic including PCI, ISA, and IDE controllers to provide a single consumer orientated PC compatible subsystem on a single device. The device is based on a tightly coupled Unified Memory Architecture (UMA), sharing memory between the CPU, the graphics, and the video. It is packaged in a 388 Plastic Ball Grid Array (PBGA).

Specifications and features

• Powerful x86 Processor • 64-Bit SDRAM UMA Controller • VGA & SVGA CRT Controller • 135 MHz RAMDAC • 2D Graphics Engine • Video Input Port

- Up-Scaler - Video Colour Space Converter - Chroma & Colour Key Support

• TV Output

- Three-Line Flicker Filter - ITU-R 601/656 Scan Converter - NTSC / PAL Composite, RGB, S-Video

• PCI Master / Slave / Arbiter • ISA Master / Slave • Optional 16-Bit Local Bus Interface • EIDE Controller • I²C Interface • IPC

- DMA Controller - Interrupt Controller - Timer / Counters

• Power Management Unit • JTAG IEEE1149.1

Application Scenarios

The STPMS2H-PUR is ideal for various applications such as consumer electronics, industrial automation, and automotive systems.

Comparison