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Description
The 74HCT373 is a high-speed Si-gate CMOS device that is pin compatible with Low-power Schottky TTL. It is an octal D-type transparent latch with separate D-type inputs for each latch and 3-state outputs for bus-oriented applications. The latch enable (LE) input and output enable (OE) input are common to all latches. The 74HCT373 consists of eight D-type transparent latches with 3-state true outputs.
When the latch enable (LE) input is HIGH, data at the Dn inputs enters the latches, making them transparent. When the latch enable (LE) input is LOW, the latches store the information that was present at the D inputs a set-up time preceding the HIGH-to-LOW transition of LE. The output enable (OE) input controls the availability of the latch outputs. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state.
Specifications and features
- 3-state non-inverting outputs for bus-oriented applications
- Common 3-state output enable input
- Functionally identical to the 74HC563; 74HCT563 and 74HC573; 74HCT573
- ESD protection: HBM JESD22-A114F exceeds 2,000 V, MM JESD22-A115-A exceeds 200 V
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Application Scenarios
The 74HCT373 is suitable for various applications, including bus-oriented systems where 3-state outputs are required. It can be used in data storage, control systems, and any application where transparent latch functionality is needed.
Comparison
Advantages- High-speed Si-gate CMOS device
- Pin compatible with Low-power Schottky TTL
- Separate D-type inputs for each latch
- 3-state outputs for bus-oriented applications
Disadvantages- None
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Similar parts: 1776 , Click to view
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- Datasheet: Download 74HCT373
- Chipdatas Part: CD94-74HCT373
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- Last Updated: 2024/06/03 05:35 +0800
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