SSTV16857D - Brand New Texas Instruments Special Logic ICs
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Description
The SSTV16857 is a 14-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V. It is intended to be incorporated into standard DIMM (Dual In-Line Memory Module) designs defined by JEDEC, such as DDR (Double Data Rate) SDRAM or SDRAM II Memory Modules. Unlike traditional SDRAM, DDR SDRAM transfers data on both clock edges (rising and falling), doubling the peak bus bandwidth. The SSTV16857 is intended to be used for SSTL_2 input and output signals. It supports class I outputs, which can be used for standard stub-series applications or capacitive loads. The device data inputs consist of differential receivers. The clock input is fully differential to be compatible with DRAM devices installed on the DIMM. The device also supports an asynchronous reset input pin to provide defined outputs even before a stable clock is supplied.
Specifications and Features
- Stub-series terminated logic for 2.5 V VDDQ (SSTL_2)
- Optimized for DDR (Double Data Rate) SDRAM applications
- Inputs compatible with JESD8–9 SSTL_2 specifications
- Flow-through architecture optimizes PCB layout
- ESD classification testing is done to JEDEC Standard JESD22, exceeding 2000 V to HBM per method A114
- Latch-up testing is done to JEDEC Standard JESD78, exceeding 100 mA
- Same form, fit, and function as SSTL16877
- Full DDR 200/266 solution @ 2.5 V when used with PCKV857
- See SSTV16856 for driver/buffer version with mode select
- Available in TSSOP-48, TVSOP-48, and 56 ball VFBGA packagesApplication Scenarios
- Incorporation into standard DIMM designs
- DDR (Double Data Rate) SDRAM applications
- SDRAM II Memory ModulesComparison
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Datasheet
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- Datasheet: Download SSTV16857D
- Chipdatas Part: CD91-SSTV16857D
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- Last Updated: 2024/06/03 09:21 +0800
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