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EPC2LC2 - Brand New Intel / Altera Memory - Configuration Proms for FPGAs - Datasheet - Chipdatas

EPC2LC2 - Brand New Intel / Altera Memory - Configuration Proms for FPGAs

In Stock:496 ,Ready for Immediate Shipping
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In Stock: 496, Ready for Immediate Shipping
Chipdatas Part No.:CD93-EPC2LC2
Manufacturer Part No.:EPC2LC2
Datecode:09+
Package:PLCC
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  • Functional Description

    With SRAM-based devices, configuration data must be reloaded each time the device powers up, the system initializes, or when new configuration data is needed. Altera configuration devices store configuration data for SRAM-based ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, and Stratix II GX devices.

    Features

    Configuration devices for SRAM-based LUT devices offer the following features:
    ■ Configures Altera ACEX® 1K, APEX® 20K (including APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria® GX, Cyclone®, Cyclone II, FLEX® 10K (including FLEX 10KE and FLEX 10KA) Mercury®, Stratix®, Stratix GX, Stratix II, and Stratix II GX devices
    ■ Easy-to-use four-pin interface
    ■ Low current during configuration and near-zero standby mode current
    ■ Programming support with the Altera Programming Unit (APU) and programming hardware from Data I/O, BP Microsystems, and other third-party programmers
    ■ Available in compact plastic packages
    ■ 8-pin plastic dual in-line (PDIP) package
    ■ 20-pin plastic J-lead chip carrier (PLCC) package
    ■ 32-pin plastic thin quad flat pack (TQFP) package
    ■ EPC2 device has reprogrammable flash configuration memory
    ■ 5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std.
    1149.1 JTAG interface
    ■ Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
    ■ Supports programming through Serial Vector Format File (.svf), Jam Standard Test and Programming Language (STAPL) Format File (.jam), JAM Byte Code File (.jbc), and the Quartus II and MAX+PLUS II softwares using the USB-Blaster, MasterBlaster®, ByteBlaster® II, EthernetBlaster, or ByteBlasterMV® download cable
    ■ Supports programming through Programmer Object File (.pof) for EPC1 and EPC1441 devices
    ■ nINIT_CONF pin allows INIT_CONF JTAG instruction to begin FPGA configuration

  • Similar parts: 289 , Click to view
    Attributes Value
    Category Memory - Configuration Proms for FPGAs
    Manufacturer Intel / Altera
    Product Category Memory - Configuration Proms for FPGA's
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    Warranty:
    • - 30-day money-back return policy,
    • - 90-day warranty against any manufacturing defects. View more
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Additional Information
  • Datasheet: Download EPC2LC2
  • Chipdatas Part: CD93-EPC2LC2
  • Warehouse: China, Hong Kong
  • Dispatch: Within 24 hours
  • Free Shipping: Yes
  • Prority Shipping: Yes, 3-5 days
  • Last Updated: 2024/05/20 20:28 +0800
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    • Full or Partial Refund , If the item is not as described
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