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Description
Micrels SY89426 Multi-Output Phase Locked Loop (PLL) is a SONET compliant clock generator providing 622.08MHz, 155.52MHz, and retimed reference clock outputs. The PLL produces low jitter OC-12/STS-12 and OC-3/STS-3 rate clocks from an input reference clock of 38.88, 51.84, or 77.76MHz. Additionally, the input reference clock is retimed and provided as a TTL/CMOS compatible output, which may be disabled to minimize switching noise. The SY89426 operates from a single +5 volt supply and requires only a simple series RC loop filter.
Specifications and Features
- Single chip source for 622.08MHz and 155.52MHz clocks
- 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL
- TTL/CMOS compatible inputs and reference output
- SONET compliant jitter performance (≤0.01UI)
- Choice of three reference frequencies
- Only 395mW (typ)
- Complies with Bellcore, CCITT, and ANSI standards
- Single +5 volt power supply
- Fully compatible with industry standard 10KH I/O levels
- Available in 28-pin PLCC package
Application Scenarios
The SY89426 PLL can be used in various applications such as telecommunications, data communications, networking equipment, and other electronic devices requiring stable clock generation and synchronization.
Comparison
The advantages of the Micrels SY89426 PLL include its SONET compliance, low jitter performance, choice of reference frequencies, low power consumption, and compatibility with industry standards. However, it is important to note that the PLL operates from a single +5 volt power supply and may require a simple series RC loop filter.
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Datasheet
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- Last Updated: 2024/06/03 10:52 +0800
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