Description

The MC68HC908QY2CDTE is a microcontroller unit (MCU) that belongs to the M68HC08 family of 8-bit MCUs. This MCU is a high-performance and low-cost option that features a complex instruction set computer (CISC) with a Von Neumann architecture. The device's enhanced M68HC08 central processor unit (CPU08) allows for a range of modules, memory sizes and types, and package types. Some features of the MC68HC908QY2CDTE include high-performance M68HC08 CPU core, fully upward compatible object code with M68HC05 Family, 5V and 3V operating voltages (VDD), and a trimmable internal oscillator.

Specifications and Features

• High-performance M68HC08 CPU core
• Fully upward-compatible object code with M68HC05 Family
• 5-V and 3-V operating voltages (VDD)
• 8-MHz internal bus operation at 5 V, 4-MHz at 3 V
• Trimmable internal oscillator
• Auto wakeup from STOP capability
• Configuration (CONFIG) register for MCU configuration options, including low-voltage inhibit (LVI) trip point
• In-system FLASH programming
• FLASH security
• On-chip in-application programmable FLASH memory (with internal program/erase voltage generation)
• 128 bytes of on-chip random-access memory (RAM)
• 2-channel, 16-bit timer interface module (TIM)
• 4-channel, 8-bit analog-to-digital converter (ADC) on MC68HC908QY2, MC68HC908QY4, MC68HC908QT2, and MC68HC908QT4
• 5 or 13 bidirectional input/output (I/O) lines and one input only:
• Six shared with keyboard interrupt function and ADC
• Two shared with timer channels
• One shared with external interrupt (IRQ)
• Eight extra I/O lines on 16-pin package only
• High current sink/source capability on all port pins
• Selectable pullups on all ports, selectable on an individual bit basis
• Three-state ability on all port pins
• 6-bit keyboard interrupt with wakeup feature (KBI)
• Low-voltage inhibit (LVI) module features, including software selectable trip point in CONFIG register
• System protection features, including computer operating properly (COP) watchdog, low-voltage detection with reset, illegal opcode detection with reset, and illegal address detection with reset
• External asynchronous interrupt pin with internal pullup (IRQ) shared with general-purpose input pin
• Master asynchronous reset pin (RST) shared with general-purpose input/output (I/O) pin
• Power-on reset
• Internal pullups on IRQ and RST to reduce external components
• Memory mapped I/O registers
• Power saving stop and wait modes
• Available in 16-pin plastic dual in-line package (PDIP), 16-pin small outline integrated circuit (SOIC) package, and 16-pin thin shrink small outline package (TSSOP) for MC68HC908QY4, MC68HC908QY2, and MC68HC908QY1; 8-pin PDIP, 8-pin SOIC, and 8-pin dual flat no lead (DFN) package for MC68HC908QT4, MC68HC908QT2, and MC68HC908QT1

Application Scenarios

The MC68HC908QY2CDTE can be used in a wide range of applications, including automotive, consumer electronics, and industrial control systems.

Comparison

• Fully upward-compatible object code with M68HC05 Family
• Trimmable internal oscillator with 8-bit trim capability allows 0.4% accuracy
• Auto wakeup from STOP capability
• In-system FLASH programming
• On-chip in-application programmable FLASH memory
• 128 bytes of on-chip random-access memory (RAM)
• Power saving stop and wait modes

• Does not offer high-speed operation compared to other microcontrollers
• Limited to 5V and 3V operating voltages (VDD)
• Low quantity of input/output (I/O) lines compared to other microcontrollers