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FUNCTIONAL DESCRIPTION
The 3D7010 10-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8ns through 50ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D7010 is TTL- and CMOS compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.
FEATURES
• All-silicon, low-power CMOS technology*
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP package)
• Low ground bounce noise
• Leading- and trailing-edge accuracy
• Delay range: 8 through 500ns
• Delay tolerance: 5% or 2ns
• Temperature stability: ±3% typical (0C-70C)
• Vdd stability: ±2% typical (4.75V-5.25V)
• Minimum input pulse width: 20% of total delay -
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Datasheet
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Shopping guide
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- Datasheet: Download 10G-100SSNL
- Chipdatas Part: CD93-10G-100SSNL
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
- Free Shipping: Yes
- Prority Shipping: Yes, 3-5 days
- Last Updated: 2024/06/03 14:08 +0800
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- Full or Partial Refund , If the item is not as described
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The fee is charged according to the rule of PayPal.
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