LCMXO256C-4MN100C - Brand New Lattice Semiconductor Programmable Logic Device (CPLDs/FPGAs)
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Description
The LCMXO256C-4MN100C is a programmable logic device that belongs to the MachXO family. It is designed to cater to the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs. This device brings together the best features of CPLD and FPGA devices on a single chip and is optimized for glue logic, bus bridging, bus interfacing, power-up control, and control logic.
Specifications and features
The LCMXO256C-4MN100C is a non-volatile, infinitely reconfigurable device that can power up in microseconds. It requires no external configuration memory and supports background programming of non-volatile memory. The device can be reconfigured through the JTAG port and can reconfigure SRAM based logic in milliseconds. It also has a sleep mode that allows up to 100x static current reduction. The device supports in-field logic update while the system is operational.
This device has high I/O to logic density, 256 to 2280 LUT4s and 73 to 271 I/Os with extensive package options. It also supports density migration and lead-free/RoHS-compliant packaging. The LCMXO256C-4MN100C comes with up to 27.6 Kbits sysMEM™ Embedded Block RAM, up to 7.5 Kbits distributed RAM, and dedicated FIFO control logic. The programmable sysIO™ buffer can support a wide range of interfaces such as LVCMOS 3.3/2.5/1.8/1.5/1.2, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, and RSDS. The device also has up to two analog PLLs per device, with clock multiply, divide, and phase shifting and is IEEE standard 1149.1 boundary scan compliant.
This device has an onboard oscillator and can operate with 3.3V, 2.5V, 1.8V or 1.2V power supply. It is also IEEE 1532 compliant in-system programming.
Application Scenarios
The LCMXO256C-4MN100C is ideal for applications commonly addressed by both CPLDs and low-capacity FPGAs. Its optimized features allow it to cater to glue logic, bus bridging, bus interfacing, power-up control, and control logic. It is used in applications like communication equipment, consumer electronics, industrial control equipment, and handheld devices.
Comparison
Advantages- Instant-on and infinitely reconfigurable
- Single chip design with no external configuration memory required
- Excellent design security with no bit stream to intercept
- Supports density migration and background programming of non-volatile memory
- Supports a wide range of interfaces including LVDS, Bus-LVDS, and LVPECL
- IEEE 1532 compliant in-system programming
Disadvantages- Not suitable for high-capacity FPGA applications
- Requires external voltage regulators for voltage levels other than 3.3V or 1.2V
- Does not support differential signaling standards such as USB and Ethernet
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Datasheet
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Shopping guide
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- Datasheet: Download LCMXO256C-4MN100C
- Chipdatas Part: CD86-LCMXO256C-4MN100C
- Warehouse: China, Hong Kong
- Dispatch: Within 24 hours
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- Last Updated: 2024/05/20 19:34 +0800
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