AD9516-5BCPZ

GENERAL DESCRIPTION

The AD9516-0 generates up to fourteen output clocks from a single input reference frequency. Integrated on chip is a complete PLL with VCO, programmable dividers, adjustable delay blocks, and multiple output logic stages. Sub-picosecond jitter performance is maintained using on-chip 2.60 – 2.95 GHz VCO. The AD9516 also supports the use of an external VCO/VCXO/VCSO up to 2.4 GHz.

FEATURES

Low Broadband Jitter, < 500 Femtoseconds RMS
On-Chip 2.60 GHz – 2.95 GHz VCO
Low Phase Noise, Integer-N Frequency Synthesizer
Digital or Analog PLL Lock Detect
Programmable Delays in R and N path
Supports Internal or External VCO
Two Reference Clock Inputs, A and B
Frequencies to 250 MHz
On-Chip Reference Clock Monitors
Auto and Manual Switchover, Holdover
Up to 14 Low Jitter Clock Drivers
Six LVPECL Outputs Operate to Max VCO Frequency
Four/Eight LVDS/CMOS outputs run 1 GHz/250 MHz
Programmable Dividers with Phase Offset
Programmable Delay on Four Channels
Serial Control Port
64-lead LFCSP package

APPLICATIONS

Low Jitter Clock Generation and Clock Distribution
Wired and Wireless Infrastructure
Base Stations, Optical Networks, Cable Head-Ends
Instrumentation and Imaging
Test Equipment, ATE
Clean Clocks for ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
Clock Cleanup and Distribution for Line Cards