AD7961BCPZ

GENERAL DESCRIPTION

The AD7961 is a 16-bit, 5 MSPS, charge redistribution successive approximation (SAR), analog-to-digital converter (ADC). The SAR architecture allows unmatched performance both in noise and in linearity. The AD7961 contains a low power, high speed, 16-bit sampling ADC, an internal conversion clock, and an internal reference buffer. On the CNV± edge, the AD7961 samples the voltage difference between the IN+ and IN− pins.

FEATURES

Throughput: 5 MSPS
16-bit resolution with no missing codes
Excellent ac and dc performance
Dynamic range: 96 dB
SNR: 95.5 dB
THD: −116 dB
INL: ±0.2 LSB (typical), ±0.55 LSB (maximum)
DNL: ±0.14 LSB (typical), ±0.25 LSB (maximum)
True differential analog input voltage range: ±4.096 V or ±5 V
Low power dissipation
46.5 mW at 5 MSPS with external reference buffer
(echoed clock mode)
64.5 mW at 5 MSPS with internal reference buffer
(echoed clock mode)
39 mW at 5 MSPS with external reference buffer
(self clocked mode, CNV± in CMOS mode)
SAR architecture
No latency/pipeline delay
External reference options: 2.048 V buffered to 4.096 V (internal
reference buffer), 4.096 V, and 5 V
Serial LVDS interface
Self clocked mode
Echoed clock mode
LVDS or CMOS option for conversion control (CNV± signal)
Operating temperature range of −40°C to +85°C
32-lead, 5 mm × 5 mm LFCSP (QFN)

APPLICATIONS

Digital imaging systems
Digital X-rays
Computed tomography
IR cameras
MRI gradient control
High speed data acquisition
Spectroscopy
Test equipment