M36DR432AD10ZA6

SUMMARY DESCRIPTION

The M36DR432AD/BD is a low-voltage Multiple Memory Product which combines two memory de vices: a 32 Mbit (2Mbit x16) non-volatile Flash memory and a 4 Mbit SRAM.
The memory is available in a Stacked LFBGA66 12x8mm - 8x8 active ball array, 0.8mm pitch pack age and supplied with all the bits erased (set to ‘1’).

FEATURES SUMMARY

■ Multiple Memory Product
– 1 bank of 32 Mbit (2Mb x16) Flash Memory
– 1 bank of 4 Mbit (256Kb x16) SRAM
■ SUPPLY VOLTAGE
– VDDF = VDDS =1.65V to 2.2V
– VPPF = 12V for Fast Program (optional)
■ ACCESS TIMES: 85ns, 100ns, 120ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code, M36DR432AD: 00A0h
– Bottom Device Code, M36DR432BD: 00A1h

FLASH MEMORY

■ MEMORY BLOCKS
– Dual Bank Memory Array: 4 Mbit, 28 Mbit
– Parameter Blocks (Top or Bottom location)
■ PROGRAMMING TIME
– 10µs by Word typical
– Double Word Program Option
■ ASYNCHRONOUS PAGE MODE READ
– Page Width: 4 Words
– Page Access: 35ns
– Random Access: 85ns, 100ns, 120ns
■ DUAL BANK OPERATIONS
– Read within one Bank while Program or
Erase within the other
– No delay between Read and Write operations
■ BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WPF for Block Lock-Down
■ COMMON FLASH INTERFACE (CFI)
– 64 bit Unique Device Identifier
– 64 bit User Programmable OTP Cells
■ ERASE SUSPEND and RESUME MODES
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ 20 YEARS DATA RETENTION
– Defectivity below 1ppm/year

SRAM

■ 4 Mbit (256Kb x16)
■ LOW VDDS DATA RETENTION: 1.0V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS