W39V040CPZ

GENERAL DESCRIPTION

The W39V040C is a 4-megabit, 3.3-volt only CMOS flash memory organized as 512K ×8 bits. For
flexible erase capability, the 4Mbits of data are divided into into 16 x 8 Kbytes pages and 6 x 64 Kbytes sectors or 8 x 64 Kbytes sectors. The device can be programmed and erased in-system with a standard 3.3V power supply. A 12-volt VPP isrequired for accelerated program.The unique cell architecture of the W39V040C results in fast program/erase operations with extremely low current consumption. This device can operate at two modes, Programmer bus interface mode, Low pin count (LPC) bus interface mode. As in the Programmer interface mode, it actslike the traditional flash but with a multiplexed address inputs. But in the LPC interface mode, this device complies with the Intel LPC specification. The device can also be programmed and erased using standard EPROM programmers.

FEATURES

•Single 3.3-volt operations:
−3.3-volt Read
−3.3-volt Erase
−3.3-volt Program
•Fast Program operation:
−Byte-by-Byte programming: 7 μS (typ.) (VPP = 12V)
−Byte-by-Byte programming: 10 μS (typ.)(VPP = Vcc)
•Fast Erase operation:
−Sector erase 0.6 Sec. (typ.)
−Page erase 0.3 Sec. (typ.)
• Fast Read access time: Tkq 11 nS
• Endurance: 50K cycles (typ.)
• Twenty-year data retention
• 6 Even sectors with 64K bytes and 16 Even pages with 8K bytes or 8 Even sectors with 64 Kbytes
• Any individual sector can be erasedHardware protection:
−#TBL supports 64-Kbyte Boot Block hardware protection
−#WP supports the whole chip except Boot Block hardware protection
•Low power consumption
−Active current: 15 mA (typ. for LPC read mode)
•Automatic program and erase timing with internal VPPgeneration
•End of program or erase detection
−Toggle bit
−Data polling
•Latched address and data
• TTL compatible I/O
• Available packages: 32L PLCC, 32L STSOP 32L PLCC Lead free, 32L STSOP Lead free