MC908AP16CFBE

General Description

1.1 Introduction
The MC68HC908AP64 is a member of the low-cost, high-performance M68HC08 Family of 8-bit
microcontroller units (MCUs). All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.

1.2 Features

Features of the MC68HC908AP64 include the following:
• High-performance M68HC08 architecture
• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
• Maximum internal bus frequency:
– 8-MHz at 5V or 3V operating voltage
• Clock input options:
– RC-oscillator
– 32-kHz crystal-oscillator with 32MHz internal PLL
• User program FLASH memory with security
– 62,368 bytes for MC68HC908AP64
– 32,768 bytes for MC68HC908AP32
– 16,384 bytes for MC68HC908AP16
– 8,192 bytes for MC68HC908AP8
• On-chip RAM
– 2,048 bytes for MC68HC908AP64 and MC68HC908AP32
– 1,024 bytes for MC68HC908AP16 and MC68HC908AP8
• Two 16-bit, 2-channel timer interface modules (TIM1 and TIM2) with selectable input capture,
output compare, and PWM capability on each channel
• Timebase module
• Serial communications interface module 1 (SCI)
• Serial communications interface module 2 (SCI) with infrared (IR) encoder/decoder
• Serial peripheral interface module (SPI)
• System management bus (SMBus), version 1.0/1.1 (multi-master IIC bus)
• 8-channel, 10-bit analog-to-digital converter (ADC)
• IRQ1 external interrupt pin with integrated pullup
• IRQ2 external interrupt pin with programmable pullup
• 8-bit keyboard wakeup port with integrated pullup
• 32 general-purpose input/output (I/O) pins:
– 31 shared-function I/O pins
– 8 LED drivers (sink)
–6×25mA open-drain I/O with pullup
• Low-power design (fully static with stop and wait modes)
• Master reset pin (with integrated pullup) and power-on reset
• System protection features
– Optional computer operating properly (COP) reset, driven by internal RC oscillator
– Low-voltage detection with optional reset or interrupt
– Illegal opcode detection with reset
– Illegal address detection with reset
• 48-pin low quad flat pack (LQFP), 44-pin quad flat pack (QFP), and 42-pin shrink dual-in-line
package (SDIP)
• Specific features of the MC68HC908AP64 in 42-pin SDIP are:
– 30 general-purpose l/Os only
– External interrupt onIRQ1 only
Features of the CPU08 include the following:
• Enhanced HC05 programming model
• Extensive loop control functions
• 16 addressing modes (eight more than the HC05)
• 16-bit Index register and stack pointer
• Memory-to-memory data transfers
• Fast 8×8 multiply instruction
• Fast 16/8 divide instruction
• Binary-coded decimal (BCD) instructions
• Optimization for controller applications
• Efficient C language support