C8051F530

System Overview

The C8051F52x/F52xA/F53x/F53xA family of devices are fully integrated, low power, mixed-signal systemon-a-chip MCUs. Highlighted features are listed below. Refer to Table 1.1 for specific product feature selection.

**■ High-speed pipelined 8051-compatible microcontroller core (up to 25

MIPS)**

■ In-system, full-speed, non-intrusive debug interface (on-chip)
■ True 12-bit 200 ksps ADC with analog multiplexer and up to 16 analog inputs
■ Precision programmable 24.5 MHz internal oscillator that is within ±0.5% across the temperature range and for VDD voltages greater than or equal to the on-chip voltage regulator minimum output at the low setting. The oscillator is within +1.0% for VDD voltages below this minimum output setting.
■ Up to 7680 bytes of on-chip Flash memory
■ 256 bytes of on-chip RAM
■ Enhanced UART, and SPI serial interfaces implemented in hardware
■ LIN 2.1 peripheral (fully backwards compatible, master and slave modes)
■ Three general-purpose 16-bit timers
■ Programmable Counter/Timer Array (PCA) with three capture/compare modules and Watchdog Timer function
■ On-chip Power-On Reset, VDD Monitor, and Temperature Sensor
■ On-chip Voltage Comparator
■ Up to 16 Port I/O

Analog Peripherals

- 12-Bit ADC
• Programmable throughput up to 200 ksps
• Up to 6/16 external inputs
• Data dependent windowed interrupt generator
• Built-in temperature sensor
- Comparator
• Programmable hysteresis and response time
• Configurable as wake-up or reset source
• Low current
- POR/Brownout Detector
- Voltage Reference—1.5 and 2.2 V (programmable)
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, nonintrusive in-system debug (No emulator required)
- Provides breakpoints, single stepping
- Inspect/modify memory and registers
- Complete development kit
Supply Voltage 2.0 to 5.25 V
- Built-in LDO regulator
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz system clock
- Expanded interrupt handler
Memory
- 8/4/2 kB Flash; In-system byte programmable in 512 byte sectors
- 256 bytes internal data RAM
Digital Peripherals
- 16/6 port I/O; push-pull or open-drain, 5 V tolerant
- Hardware SPI™, and UART serial port
- LIN 2.1 Controller (Master and Slave capable); no crystal required
- Three general purpose 16-bit counter/timers
- Programmable 16-bit counter/timer array with three capture/compare modules, WDT
Clock Sources
- Internal oscillators: 24.5 MHz ±0.5% accuracy supports UART and LIN-Master operation
- External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
- Can switch between clock sources on-the-fly
Packages
- 10-Pin DFN (3 x 3 mm)
- 20-pin QFN (4 x 4 mm)
- 20-pin TSSOP
Automotive Qualified
- Temperature Range: –40 to +125 °C
- Compliant to AEC-Q100