SDA9187-2XGEG

General Description

The Picture Insertion Processor SDA 9189X generates a reduced size picture of an inset video channel for the purpose of combining it with another video signal (parent channel). The easy implementation of the IC into an existing system needs only a few additional external components. There is a great variety of application facilities in consumer and professional products (TV sets, VCRs, supervising monitors, multi-media, etc.).

Features

• High system integration
Filtering, field memory, RGB-matrix,
DA-Conversion, clock generation, and control
circuits integrated on one chip
• 4 picture sizes
1/4th, 1/9th, 1/16th, or 1/36th of normal size
• High resolution display
13.5 MHz/27 MHz display clock frequency
288 luminance and 72 chrominance pixels per inset line for picture size 1/4
6-bit amplitude resolution for each incoming signal component
Frame mode display in single-PIP modes
Horizontal and vertical filtering
Special antialias filtering for the luminance signal
• Single and multi PIP display
Up to 9 pictures of 1/36th size (8 still and 1 moving)
Up to 4 pictures of 1/16th size (3 still and 1 moving)
Up to 2 pictures of 1/9th size (1 still and 1 moving)
Up to 3 pictures of 1/9th size (2 still and 1 moving) as POP display in 16:9 TV sets
(In multi-PIP modes only field mode display possible)
• Multistandard applications
Automatic recognition of 625 lines/525 lines standard (inset and parent channel)
Scan conversion systems as flickerfree display systems (parent channel)
• HDTV (parent channel)
• 16:9 compatibility
Operation in 4:3 and 16:9 TV sets
4:3 inset signals on 16:9 displays (picture size 1/4 and 1/9)
16:9 inset signals on 4:3 displays (picture size 1/9 and 1/16)
• Digital inputs
Y, + (B-Y), + (R-Y)
Compatible with Triple ADC SDA 9187-2X
• Analog outputs
Y, + (B-Y), + (B-Y) or Y, – (B-Y), – (B-Y) or RGB
3 RGB-matrices: EBU, NTSC (Japan), NTSC (USA)
• Digital to analog converter output e.g. for color decoder adjustment
6-bit resolution
• Freely programmable position of inset picture
Steps of 1 pixel and 1 line
All PIP and POP positions are possible inside the standard display area
• Programmable framing
4096 frame colors
Variable frame width
• Full screen background insertion
64 background colors or transparent display (parent picture seen)
• Wipe-in/Wipe-out facility
Start and end of insertion is the lower right PIP corner
4 periods programmable
• Freeze picture
• I2C Bus control
• Up to three ICs in one application
Three different I2C Bus addresses
Up to 3 moving pictures using 3 ICs
Up to 27 pictures of 1/36th size
• On-screen display of channel index
64 characters programmable (alphanumeric and special symbols)
5 characters displayed in every PIP picture
4 different character luminance values (B-Y = R-Y = ‘0’)
4 background luminance values (B-Y = R-Y = ‘0’) or transparent mode
(inset picture seen)
• Numerical display PLL circuit for high stability clock generation
• No necessity of PAL/SECAM delay lines when using suitable color decoders
• P-DSO-32 package/350 mil (SMD)
• 5 V supply voltage