ST72F345C4T6

INTRODUCTION

The ST7234x devices are members of the ST7 microcontroller family. All devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set.
They feature single-voltage FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In Application Programming (IAP) capabilities.

■ Memories

– up to 16 Kbytes Program memory: Single voltage extended Flash (XFlash) with read-out and write protection, In-Circuit and In-Application Programming (ICP and IAP). 10K write/ erase cycles guaranteed, data retention: 20 years at 55°C.
– up to 1 Kbyte RAM
– 256 bytes data EEPROM with read-out protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55°C.
■ Clock, Reset and Supply Management
– Power On / Power Off safe reset with 3 programmable threshold levels (LVD)
– Auxiliary Voltage Detector (AVD)
– Clock sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
– PLL for 4x or 8x frequency multiplication
– 5 Power Saving Modes: Slow, Wait, Halt, Auto-Wakeup from Halt and Active Halt
– Clock output capability (fCPU)
■ Interrupt Management
– Nested interrupt controller
– 10 interrupt vectors plus TRAP and RESET
– 9 external interrupt lines on 4 vectors
■ Up to 34 I/O Ports
– up to 34 multifunctional bidirectional I/O lines
– up to 12 high sink outputs (10 on 32-pin devices)
■ 4 Timers
– Configurable window watchdog timer
– Realtime base
– 16-bit timer A with: 1 input capture, 1 output compares, external clock input, PWM and Pulse generator modes
– 16-bit timer B with: 2 input captures, 2 output compares, PWM and Pulse generator modes
■ 3 Communication Interfaces
– I2C Multi Master / Slave
– I2C Slave 3 Addresses No Stretch with DMA access and Byte Pair Coherency on I²C Read
– SCI asynchronous serial interface (LIN compatible)
– SPI synchronous serial interface
■ 1 Analog peripheral
– 10-bit ADC with 12 input channels (8 on 32- pin devices)
■ Instruction Set
– 8-bit data manipulation
– 63 basic instructions with illegal opcode detection
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
■ Development tools
– Full hardware/software development package
– On-Chip Debug Module