LW040A

Summary description

The M50FLW040 is a 4 Mbit (512 Kb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (3.0 to 3.6V) supply. For fast programming and fast erasing in production lines, an optional 12 V power supply can be used to reduce the erasing and programming time.
The memory is divided into 8 Uniform Blocks of 64 KBytes each, three of which are divided into 16 uniform sectors of 4 KBytes each (see Appendix A for details). All blocks and sectors can be erased independently. So, it is possible to preserve valid data while old data is erased. Blocks can be protected individually to prevent accidental program or erase commands from modifying their contents.
Program and erase commands are written to the Command Interface of the memory. An on chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set to control the memory is consistent with the JEDEC standards.

Feature summary

■ Flash memory
– Compatible with either the LPC interface or the FWH interface (Intel Spec rev1.1) used in PC BIOS applications
– 5 Signal Communication Interface supporting Read and Write Operations
– 5 Additional General Purpose Inputs for platform design flexibility
– Synchronized with 33MHz PCI clock
■ 8 blocks of 64 Kbytes
– 5 blocks of 64 KBytes each
– 3 blocks, subdivided into 16 uniform sectors of 4 KBytes each
Two blocks at the top and one at the bottom (M50FLW040A)
One block at the top and two at the bottom (M50FLW040B)
■ Enhanced security
– Hardware Write Protect Pins for Block Protection
– Register-based Read and Write Protection
■ Supply voltage
– VCC = 3 to 3.6V for Program, Erase and Read Operations
– VPP = 12V for Fast Program and Erase
■ Two interfaces
– Auto Detection of Firmware Hub (FWH) or Low Pin Count (LPC) Memory Cycles for Embedded Operation with PC Chipsets
– Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility.
■ Programming time: 10 µs typical
■ Program/Erase Controller
– Embedded Program and Erase algorithms
– Status Register Bits
■ Program/Erase Suspend
– Read other Blocks/Sectors during Program Suspend
– Program other Blocks/Sectors during Erase Suspend
■ Electronic signature
– Manufacturer Code: 20h
– Device Code (M50FLW040A): 08h
– Device Code (M50FLW040B): 28h
■ Packages
– ECOPACK® (RoHS compliant)