IT8705

Product Details

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[ ITE Tech. Inc ]

General Description

The IT8705F is a LPC Interface based highly integrated Super I/O. The IT8705F provides the most commonly used legacy Super I/O functionality plus the latest Environment Control initiatives, such as Hardware Monitor, Fan Speed Controller and ITE’s “SmartGuardian” function. The device’s LPC interface complies with Intel “LPC Interface Specification Rev. 1.0” (Sept. 29, 1997). The IT8705F meets the “Microsoft PC98 & PC99 System Design Guide” requirements and is ACPI compliant.

Features

■ Low Pin Count Interface
− Compliant with Intel LPC Interface Specification Rev.1.0 (Sept. 29, 1997)
− Supports Serial IRQ Protocol
− Supports PCI PME# Interface
■ PC98/PC99, ACPI Compliant
− PC98 & PC99 compliant
− Register sets compatible with “Plug and Play ISA Specification Rev. 1.0a”
− ACPI V. 1.0 compliant
− Supports 9 logical devices
■ Enhanced Hardware Monitor
− Built-in 8-bit Analog to Digital Converter
− 3 thermal inputs from remote thermistors or thermal diode or diode-connected transistor
− 8 voltage monitor inputs (VBAT is measured internally.)
− Watch Dog comparison of all monitored values
■ Fan Speed Controller
− Provides Fan ON/OFF and PWM control
− 3 programmable Pulse Width Modulation (PWM) Fan control outputs
− Each PWM output supports 128 steps of PWM modes
− Monitors 3 Fan tachometer inputs
■ Game Port
− Built-in 558 quad timers and buffer chips
− Supports direct connection of two joysticks
− Game port signals are multiplexed with GPIOs
■ Two 16C550 UARTs
− Supports two standard Serial ports
− UART1 is dedicated for Serial port
− UART2 supports either Serial Port or IrDA 1.0/ASKIR
■ MIDI Interface
− UART implementation
− Supports direct connection to MPU-401 MIDI
■ Consumer Remote Control (TV remote) IR with Power-up Feature
■ IEEE 1284 Parallel Port
− Standard mode -- Bi-directional SPP compliant
− Enhanced mode -- EPP V.1.7 and 1.9 compliant
− High speed mode -- ECP, IEEE 1284 compliant
− Backdrive current reduction
− Printer power-on damage reduction
− Supports POST (Power-On Self Test) Data Port
■ Floppy Disk Controller
− Supports two 360K/ 720K/ 1.2M/ 1.44M/ 2.88M floppy disk drives
− Enhanced digital data separator
− 3-Mode drives supported
− Supports automatic write protection via software
■ Smart Card Reader
− Compliant with Personal Computer Smart Card (PC/SC) Working Group standard
− Compliant with smart card (ISO 7816) protocols
− Supports card present detect
− Supports one programmable clock frequency, 7.1 MHz, and 3.5 MHz (default) card clocks
■ 48 General Purpose I/O Pins
− Input mode supports switch de-bounce
− SMI is routed through GPIOs
− Power LED Blinking Control
− Hardware Monitor Warning Beep Output
− External IRQ Inputs Routing into Serial IRQ
− Watch Dog Timer
■ Flash ROM Interface
− Up to 8M bits flash supported
■ Single 24/48 MHz Clock Inputs
■ Only for IT8705AF
− 1 chassis open detection input with low power Flip-Flop backed by the battery
■ 128-Pin QFP