ADBF549WBBCZ504

GENERAL DESCRIPTION

The ADSP-BF539/ADSP-BF539F processors are members of the Blackfin® family of products, incorporating the Analog Devices, Inc./Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC, state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction set architecture.

FEATURES

Up to 533 MHz high performance Blackfin processor
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of
programming and compiler friendly support
Advanced debug, trace, and performance monitoring
Wide range of operating voltages; see Operating Conditions
on Page 26
Qualified for automotive applications
Programmable on-chip voltage regulator
316-ball Pb-free CSP_BGA package

MEMORY

148K bytes of on-chip memory
16K bytes of instruction SRAM/cache
64K bytes of instruction SRAM
32K bytes of data SRAM
32K bytes of data SRAM/cache
4K bytes of scratchpad SRAM
Optional 8M bit parallel flash with boot option
Memory management unit providing memory protection
External memory controller with glueless support
for SDRAM, SRAM, flash, and ROM
Flexible memory booting options from SPI and external
memory

PERIPHERALS

Parallel peripheral interface (PPI), supporting ITU-R 656
video data formats
4 dual-channel, full-duplex synchronous serial ports,
supporting 16 stereo I2S channels
2 DMA controllers supporting 26 peripheral DMAs
4 memory-to-memory DMAs
Controller area network (CAN) 2.0B controller
Media transceiver (MXVR) for connection
to a MOST network
3 SPI-compatible ports
Three 32-bit timer/counters with PWM support
3 UARTs with support for IrDA
2 TWI controllers compatible with I2C industry standard
Up to 38 general-purpose I/O pins (GPIO)
Up to 16 general-purpose flag pins (GPF)
Real-time clock, watchdog timer, and 32-bit core timer
On-chip PLL capable of frequency multiplication
Debug/JTAG interface