DSPB56724AG

DSPB56724AG Description

The DSP56011 is a high-performance programmable Digital Signal Processor (DSP) developed for Digital Versatile Disc (DVD), High-Definition Television (HDTV), and Advanced Set-top audio decoding. The DSP56011 is optimized with audio- specific peripherals and customized memory configuration, and may be programmed with Motorola’s certified software for Dolby AC-3 5.1 Channel Surround, Dolby Pro Logic, and MPEG1 Layer 2.

DSPB56724AG Features

Digital Signal Processing Core
• Efficient, object-code compatible, 24-bit DSP56000 family DSP engine
– 47.5 Million Instructions Per Second (MIPS) with 21.05 ns instruction cycle at 95 MHz
– Highly parallel instruction set with unique DSP addressing modes
– Two 56-bit accumulators including extension byte
– Parallel 24 × 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)
– Double precision 48 × 48-bit multiply with 96-bit result in 6 instruction cycles
– 56-bit addition/subtraction in 1 instruction cycle
– Fractional and integer arithmetic with support for multi-precision arithmetic
– Hardware support for block-floating point Fast Fourier Transforms (FFT)
– Hardware nested DO loops
– Zero-overhead fast interrupts (2 instruction cycles)
– PLL-based clocking with a wide range of frequency multiplications (1 to 4096) and power saving clock divider (2i : i = 0 to 15), which reduces clock noise
– Four 24-bit internal data buses and three 16-bit internal address buses for simultaneous accesses to one program and two data memories